PZTA96ST1
Preferred Device
High Voltage Transistor
PNP Silicon
MAXIMUM RATINGS
Rating
Collector–Emitter Voltage
Collector–Base Voltage
Emitter–Base Voltage
Collector Current
Total Power Dissipation Up to
T
A
= 25°C (Note 1)
Storage Temperature Range
Junction Temperature
Symbol
V
CEO
V
CBO
V
EBO
I
C
P
D
T
stg
T
J
Value
–450
–450
–5.0
–500
1.5
–65 to +150
150
Unit
Vdc
Vdc
Vdc
mAdc
Watts
°C
°C
4
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COLLECTOR 2,4
BASE
1
EMITTER 3
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance from Junction to
Ambient (Note 1)
Symbol
R
qJA
Max
83.3
Unit
°C
1
2
3
AWW
ZTA96
ELECTRICAL CHARACTERISTICS
(Note 2)
Characteristic
Symbol
Min
Max
Unit
SOT–223, TO–261AA
CASE 318E
STYLE 1
A
WW
= Location
= Work Week
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage
(I
C
= –1.0 mAdc, I
B
= 0)
Collector–Emitter Breakdown Voltage
(I
C
= –100
mAdc,
I
E
= 0)
Emitter–Base Breakdown Voltage
(I
E
= –10
mAdc,
I
C
= 0)
Collector–Base Cutoff Current
(V
CB
= –400 Vdc, I
E
= 0)
Emitter–Base Cutoff Current
(V
BE
= –4.0 Vdc, I
C
= 0)
V
(BR)CEO
V
(BR)CBO
V
(BR)EBO
I
CBO
I
EBO
–450
–450
–5.0
–
–
–
–
–
–0.1
–0.1
Vdc
Vdc
Vdc
mAdc
mAdc
Preferred
devices are recommended choices for future use
and best overall value.
ORDERING INFORMATION
Device
PZTA96ST1
Package
SOT–223
Shipping
1000/Tape & Reel
ON CHARACTERISTICS
DC Current Gain (Note 3)
(I
C
= –10 mAdc, V
CE
= –10 Vdc)
Saturation Voltages
(I
C
= –20 mAdc, I
B
= –2.0 mAdc)
(I
C
= –20 mAdc, I
B
= –2.0 mAdc)
h
FE
50
150
–
Vdc
V
CE(sat)
V
BE(sat)
–
–
–0.6
–1.0
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in.
x 0.059 in.; mounting pad for the collector lead min. 0.93 in
2
.
2. T
A
= 25°C unless otherwise noted.
3. Pulse Test: Pulse Width
≤
300
ms;
Duty Cycle = 2.0%.
©
Semiconductor Components Industries, LLC, 2002
1
June, 2002 – Rev. 1
Publication Order Number:
PZTA96ST1/D
PZTA96ST1
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.15
3.8
0.079
2.0
0.248
6.3
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT–223
0.091
2.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
mm
inches
SOT–223 POWER DISSIPATION
The power dissipation of the SOT–223 is a function of
the pad size. This can vary from the minimum pad size for
soldering to the pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
mined by T
J(max)
, the maximum rated junction temperature
of the die, Rq
JA
, the thermal resistance from the device
junction to ambient; and the operating temperature, T
A
. Us-
ing the values provided on the data sheet for the SOT–223
package, P
D
can be calculated as follows.
P
D
=
T
J(max)
– T
A
R
qJA
doubled with this method, area is taken up on the printed
circuit board which can defeat the purpose of using
surface mount technology. A graph of R
qJA
versus collec-
tor pad area is shown in Figure 1.
160
R JA , Thermal Resistance, Junction
to Ambient ( C/W)
Board Material = 0.0625″
G 10/FR 4, 2 oz Copper
0.8 Watts
T
A
= 25°C
140
°
120
1.25 Watts*
1.5 Watts
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T
A
of 25°C, one
can calculate the power dissipation of the device which in
this case is 1.5 watts.
P
D
=
150°C – 25°C
83.3°C/W
= 1.50 watts
100
*Mounted on the DPAK footprint
0.2
0.4
0.6
A, Area (square inches)
0.8
1.0
θ
80
0.0
The 83.3°C/W for the SOT-223 package assumes the
use of the recommended footprint on a glass epoxy
printed circuit board to achieve a power dissipation of 1.5
watts. There are other alternatives to achieving higher
power dissipation from the SOT-223 package. One is to
increase the area of the collector pad. By increasing the
area of the collector pad, the power dissipation can be
increased. Although the power dissipation can almost be
Figure 1. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Another alternative would be to use a ceramic substrate
or an aluminum core board such as Thermal Clad™. Using
a board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
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PZTA96ST1
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the surface mounted package
should be the same as the pad size on the printed circuit
board, i.e., a 1:1 registration.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•
Always preheat the device.
•
The delta temperature between the preheat and
soldering should be 100°C or less.*
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference should be a maximum of 10°C.
•
The soldering temperature and time should not exceed
260°C for more than 10 seconds.
•
When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
•
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
•
Mechanical stress or shock should not be applied dur-
ing cooling
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones,
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session to the next. Figure 7 shows a typical heating profile
for use when soldering a surface mount device to a printed
circuit board. This profile will vary among soldering
systems but it is a good starting point. Factors that can
affect the profile include the type of soldering system in
use, density and types of components on the board, type of
solder used, and the type of board or substrate material
being used. This profile shows temperature versus time.
The line on the graph shows the actual temperature that
might be experienced on the surface of a test board at or
near a central solder joint. The two profiles are based on a
high density and a low density board. The Vitronics
SMD310 convection/infrared reflow soldering system was
used to generate this profile. The type of solder used was
62/36/2 Tin Lead Silver with a melting point between
177–189°C. When this type of furnace is used for solder
reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
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