EEWORLDEEWORLDEEWORLD

Part Number

Search

JANTXV1N3046B

Description
120 V, 1 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-13
CategoryDiscrete semiconductor    diode   
File Size136KB,3 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

JANTXV1N3046B Overview

120 V, 1 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-13

JANTXV1N3046B Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMicrosemi
Parts packaging codeDO-13
package instructionO-MALF-W2
Contacts2
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresHIGH RELIABILITY
Shell connectionCATHODE
ConfigurationSINGLE
Diode component materialsSILICON
Diode typeZENER DIODE
JEDEC-95 codeDO-202AA
JESD-30 codeO-MALF-W2
JESD-609 codee0
Humidity sensitivity level1
Number of components1
Number of terminals2
Package body materialMETAL
Package shapeROUND
Package formLONG FORM
Peak Reflow Temperature (Celsius)NOT SPECIFIED
polarityUNIDIRECTIONAL
Maximum power dissipation1 W
Certification statusNot Qualified
GuidelineMIL-19500/115
Nominal reference voltage120 V
surface mountNO
technologyZENER
Terminal surfaceTIN LEAD
Terminal formWIRE
Terminal locationAXIAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Maximum voltage tolerance5%
Working test current2 mA
Base Number Matches1
1N3016BUR-1 thru 1N3051BUR-1, e3
(or MLL3016B thru MLL3051B, e3)
SCOTTSDALE DIVISION
Surface Mount 1.5 W
GLASS ZENER DIODES
DESCRIPTION
This surface mountable zener diode series is similar to the 1N3016 thru
1N3051 JEDEC registration in the DO-13 package except that it meets the
surface mount DO-213AB outline. It is an ideal selection for applications of
high density and low parasitic requirements. Due to its glass hermetic seal
qualities and metallurgically enhanced internal construction, it is also well
suited for high-reliability applications. This can be acquired by a source
control drawing (SCD), or by ordering device types with MQ, MX, or MV
prefix to part number for equivalent screening to JAN, JANTX or JANTXV.
APPEARANCE
WWW .
Microsemi
.C
OM
DO-213AB
IMPORTANT:
For the most current data, consult
MICROSEMI’s
website:
http://www.microsemi.com
FEATURES
Leadless surface mount package equivalents to the
JEDEC registered 1N3016 thru 1N3051 except with
higher power rating of 1.5 Watts
Ideal for high-density mounting
Voltage range: 6.8 to 200 volts
Hermetically sealed, double-slug glass construction
Metallurgically enhanced contact construction.
Options for screening in accordance with MIL-PRF-
19500/115 for JAN, JANTX, JANTXV, and JANS with
MQ, MX, MV, or MSP prefixes respectively for part
numbers, e.g. MX1N3016BUR-1, MV1N3051BUR-1,
etc.
Axial lead “thru-hole” DO-13 packages per JEDEC
registration available as 1N3016B thru 1N3051B (see
separate data sheet with MIL-PRF-19500/115
qualification)
RoHS Compliant devices available by adding “e3” suffix
APPLICATIONS / BENEFITS
Regulates voltage over a broad operating current
and temperature range
Wide selection from 6.8 to 200 V
Tight voltage tolerances available
Low reverse (leakage) currents
Leadless package for surface mounting
Ideal for high-density mounting
Metallurgically enhanced internal contact design for
greater reliability and lower thermal resistance
Nonsensitive to ESD
Hermetically sealed glass package
Specified capacitance (see Figure 2)
Inherently radiation hard as described in Microsemi
MicroNote 050
MAXIMUM RATINGS
Power dissipation at 25
º
C: 1.5 watts (also see
derating in Figure 1).
Operating and Storage temperature: -65
º
C to
+175
º
C
Thermal Resistance: 40
º
C/W junction to end cap,
º
or 120 C/W junction to ambient when mounted on
FR4 PC board (1 oz Cu) with recommended
footprint (see last page)
Steady-State Power: 1.50 watts at end-cap
temperature T
EC
< 115
o
C, or 1.25 watts at T
A
= 25
º
C
when mounted on FR4 PC board and
recommended footprint as described for thermal
resistance (also see Figure 1)
Forward voltage @200 mA: 1.2 volts (maximum)
º
Solder Temperatures: 260 C for 10 s (max)
MECHANICAL AND PACKAGING
CASE: Hermetically sealed glass MELF package
TERMINALS: Tin-lead or RoHS compliant
annealed matte-Tin plating solderable per MIL-
STD-750, method 2026
POLARITY: Cathode indicated by band. Diode to
be operated with the banded end positive with
respect to the opposite end for Zener regulation
MARKING: Cathode band only
TAPE & REEL optional: Standard per EIA-481-1-A
with 12 mm tape, 1500 per 7 inch reel or 5000 per
13 inch reel (add “TR” suffix to part number)
WEIGHT: 0.05 grams
See package dimensions on last page
1N3016BUR-1, e3 thru
1N3051BUR-1, e3
Copyright
©
2006
3-12-2006 REV D
Microsemi
Scottsdale Division
8700 E. Thomas Rd. PO Box 1390, Scottsdale, AZ 85252 USA, (480) 941-6300, Fax: (480) 947-1503
Page 1
ROM instantiation problem
Experts, can you guide me, a newbie, on how to instantiate ROM in the top-level file?...
zhenpeng25 FPGA/CPLD
I want to buy an ordinary desktop computer for industrial computer experiments. Which Dell model is better?
Requires more than 3 PCI 232 ports, and a compact chassis. Do you have any other requirements?...
gdxxhe Embedded System
Ask a verification question, and you can get points immediately if you know the answer
Samsung 2440A, an ARM9 chip, has registers such as GSTATUS2 and GSTATUS4. The description says that GSTATUS4 will only lose data when the power is reset. Otherwise, the data is always saved. Here is m...
cindydai Embedded System
How to add Chinese characters to PCB
As the title: I use 99se No Chinese version It seems that Chinese translation is not working....
heningbo PCB Design
Please help me answer the question about the dialog box.
I wrote a program with VC++, and it compiled successfully, but the dialog box did not pop up. What is the reason? It always popped up before. Later, I added code to a CButton control, and clicked Buil...
saber_tooth Embedded System
【Design Tools】FPGACPLD Design Tools──Detailed Explanation of Xilinx+ISE
Contents Chapter 1 Introduction to the ISE System... 1 11 Introduction to FPGA/CPLD 1 111 Basic principles of FPGA/CPLD 2 112 Characteristics of FPGA and CPLD 7 12 FPGA/CPLD design process 9 13 Charac...
nwx8899 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 904  2068  1645  2630  2149  19  42  34  53  44 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号