Burr Brown Products
from Texas Instruments
ADS7887
ADS7888
SLAS468 – JUNE 2005
10-/8-Bit, 1.25-MSPS, MICRO-POWER, MINIATURE
SAR ANALOG-TO-DIGITAL CONVERTERS
FEATURES
•
•
•
•
•
•
•
1.25-MHz Sample Rate Serial Device
10-Bit Resolution – ADS7887
8-Bit Resolution – ADS7888
Zero Latency
25-MHz Serial Interface
Supply Range: 2.35 V to 5.25 V
Typical Power Dissipation at 1.25 MSPS:
– 3.8 mW at 3-V V
DD
– 8 mw at 5-V V
DD
±0.35
LSB INL, DNL – ADS7887
±0.15
LSB INL,
±0.1
LSB DNL – ADS7888
61dB SINAD, -84 dB THD – ADSA7887
49.5 dB SINAD, -67.5 dB THD – ADS7888
Unipolar Input Range: 0 V to V
DD
Power Down Current: 1 µA
Wide Input Bandwidth: 15 MHz at 3 dB
6-Pin SOT23 and SC70 Packages
APPLICATIONS
•
•
•
•
•
•
•
•
Base Band Converters in Radio Communi-
cation
Motor Current/Bus Voltage Sensors in Digital
Drives
Optical Networking (DWDM, MEMS Based
Switching)
Optical Sensors
Battery Powered Systems
Medical Instrumentations
High-Speed Data Acquisition Systems
High-Speed Closed-Loop Systems
•
•
•
•
•
•
•
•
DESCRIPTION
The ADS7887 is a 10-bit, 1.25-MSPS analog-to-digital converter (ADC), and the ADS7888 is a 8-bit, 1.25-MSPS
ADC. The devices include a capacitor based SAR A/D converter with inherent sample and hold. The serial
interface in each device is controlled by the CS and SCLK signals for glueless connections with microprocessors
and DSPs. The input signal is sampled with the falling edge of CS, and SCLK is used for conversion and serial
data output.
The devices operate from a wide supply range from 2.35 V to 5.25 V. The low power consumption of the devices
make them suitable for battery-powered applications. The devices also include a power saving powerdown
feature for when the devices are operated at lower conversion speeds.
The high level of the digital input to the device is not limited to device V
DD
. This means the digital input can go as
high as 5.25 V when device supply is 2.35 V. This feature is useful when digital signals are coming from other
circuit with different supply levels. Also this relaxes restriction on power up sequencing.
The ADS7887 and ADS7888 are available in 6-pin SOT23 and SC70 packages and are specified for operation
from -40°C to 125°C.
Micro-Power Miniature SAR Converter Family
BIT
12-Bit
10-Bit
8-Bit
< 300 KSPS
ADS7866 (1.2 V
DD
to 3.6 V
DD
)
ADS7867 (1.2 V
DD
to 3.6 V
DD
)
ADS7868 (1.2 V
DD
to 3.6 V
DD
)
300 KSPS – 1.25 MSPS
ADS7886 (2.35 V
DD
to 5.25 V
DD
)
ADS7887 (2.35 V
DD
to 5.25 V
DD
)
ADS7888 (2.35 V
DD
to 5.25 V
DD
)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
www.ti.com
ADS7887
ADS7888
SLAS468 – JUNE 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
PACKAGE/ORDERING INFORMATION
(1)
DEVICE
MAXIMUM
INTEGRAL
LINEARITY
(LSB)
MAXIMUM
DIFFEREN-
TIAL
LINEARITY
(LSB)
NO MISSING
CODES AT
RESOLUTION
(BIT)
PACK-
AGE
TYPE
PACK-
AGE
DESIG-
NATOR
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
INFORMATION
TRANSPORT
MEDIA
QUANTITY
Tape and
reel 250
Tape and
reel 3000
Tape and
reel 250
Tape and
reel 3000
Tape and
reel 250
Tape and
reel 3000
Tape and
reel 250
Tape and
reel 3000
6-Pin
SOT23
ADS7887
±0.75
±0.5
10
6-Pin
SC70
BAWQ
DBV
BAWQ
–40°C to 125°C
BNI
DCK
BNI
BAZQ
DBV
BAZQ
–40°C to 125°C
BNH
DCK
BNH
ADS7887SDBVT
ADS7887SDBVR
ADS7887SDCKT
ADS7887SDCKR
ADS7888SDBVT
ADS7888SDBVR
ADS7888SDCKT
ADS7888SDCKR
6-Pin
SOT23
ADS7888
±0.3
±0.3
8
6-Pin
SC70
(1)
For most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
UNIT
+IN to AGND
+V
DD
to AGND
Digital input voltage to GND
Digital output to GND
Operating temperature range
Storage temperature range
Junction temperature (T
J
Max)
Power dissipation, SOT23 and SC70 packages
θ
JA
Thermal impedance
Lead temperature, soldering
(1)
SOT23
SC70
Vapor phase (60 sec)
Infrared (15 sec)
–0.3 V to +V
DD
+0.3 V
–0.3 V to 7.0 V
–0.3V to (7.0 V)
–0.3 V to (+V
DD
+ 0.3 V)
–40°C to 125°C
–65°C to 150°C
150°C
(T
J
Max–T
A
)/θ
JA
295.2°C/W
351.3°C/W
215°C
220°C
Stresses above those listed under
absolute maximum ratings
may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
3
ADS7887
ADS7888
SLAS468 – JUNE 2005
www.ti.com
ADS7887 SPECIFICATIONS
+V
DD
= 2.35 V to 5.25 V, T
A
= –40°C to 125°C, f
sample
= 1.25 MHz
PARAMETER
ANALOG INPUT
Full-scale input voltage span
(1)
Absolute input voltage range
C
i
I
Ilkg
Input
capacitance
(2)
T
A
= 125°C
Input leakage current
Resolution
No missing codes
INL
DNL
E
O
E
G
Integral nonlinearity
Differential nonlinearity
Offset
error
(4) (5) (6)
Gain error
(5)
Conversion time
Acquisition time
Maximum throughput rate
Aperture delay
Step Response
Overvoltage recovery
DYNAMIC CHARACTERISTICS
THD
SINAD
SFDR
Total harmonic distortion
(7)
Signal-to-noise and distortion
Spurious free dynamic range
Full power bandwidth
DIGITAL INPUT/OUTPUT
Logic family — CMOS
V
IH
V
IL
V
OH
V
OL
+V
DD
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Supply voltage
Supply current (normal mode)
Power down state supply current
Power dissipation at 1.25 MHz
throughput
At V
DD
= 2.35 V to 5.25 V, 1.25-MHz throughput
At V
DD
= 2.35 V to 5.25 V, static state
SCLK off
SCLK on (25 MHz)
V
DD
= 5 V
V
DD
= 3 V
8
3.8
VDD = 2.35 V to 5.25 V
V
DD
= 5 V
V
DD
= 3 V
At I
source
= 200 µA
At I
sink
= 200 µA
2.35
3.3
V
DD
–0.2
0.4
5.25
2
1.5
1
200
10
6
V
DD
–
0.4
5.25
0.8
0.4
V
V
V
100 kHz
100 kHz
100 kHz
At –3 dB
60.5
73
–84
61
81
15
–72
dB
dB
dB
MHz
25-MHz SCLK
5
160
160
25-MHz SCLK
10
–0.75
–0.5
–1.5
–1
530
260
1.25
±0.35
±0.35
±0.5
±0.5
560
0.75
0.5
1.5
1
+IN
0
–0.20
21
40
10
V
DD
V
DD
+0.20
V
V
pF
nA
Bits
Bits
LSB
(3)
LSB
LSB
LSB
ns
ns
MHz
ns
ns
ns
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SYSTEM PERFORMANCE
SAMPLING DYNAMICS
POWER SUPPLY REQUIREMENTS
V
mA
µA
mW
(1)
(2)
(3)
(4)
(5)
(6)
(7)
4
Ideal input span; does not include gain or offset error.
Refer
Figure 36
for details on sampling circuit
LSB means least significant bit
Measured relative to an ideal full-scale input
Offset error and gain error ensured by characterization.
First transition of 000H to 001H at 0.5 × (V
ref
/2
10
)
Calculated on the first nine harmonics of the input frequency
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