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VS-ETF150Y65N

Description
IGBT Modules 650V Vces 150A Ic 3 Levels Half-Bridge
Categorysemiconductor    Discrete semiconductor   
File Size266KB,13 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
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VS-ETF150Y65N Overview

IGBT Modules 650V Vces 150A Ic 3 Levels Half-Bridge

VS-ETF150Y65N Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerVishay
Product CategoryIGBT Modules
RoHSDetails
ProductIGBT Silicon Modules
ConfigurationHalf Bridge
Collector- Emitter Voltage VCEO Max650 V
Collector-Emitter Saturation Voltage1.7 V
Continuous Collector Current at 25 C201 A
Gate-Emitter Leakage Current+/- 600 nA
Pd - Power Dissipation600 W
Package / CaseEMIPAK-2B
Maximum Operating Temperature+ 175 C
PackagingTube
Mounting StyleScrew
Maximum Gate Emitter Voltage20 V
Factory Pack Quantity56
VS-ETF150Y65N
www.vishay.com
Vishay Semiconductors
EMIPAK 2B PressFit Power Module
3-Levels Half Bridge Inverter Stage, 150 A
FEATURES
• Trench IGBT technology
• FRED Pt
®
clamping diodes
• PressFit pins technology
• Exposed Al
2
O
3
substrate with low thermal resistance
• Short circuit rated
• Square RBSOA
• Integrated thermistor
• Low internal inductances
EMIPAK-2B
(package example)
• Low switching loss
• PressFit pins locking technology. Patent # US.263.820 B2
• UL approved file E78996
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
PRIMARY CHARACTERISTICS
Q1 to Q4 IGBT
V
CES
V
CE(on)
typical at I
C
= 150 A
I
C
at T
C
= 82 °C
Speed
Package
Circuit configuration
650 V
1.70 V
150 A
8 kHz to 30 kHz
EMIPAK 2B
3-levels half bridge inverter stage
DESCRIPTION
VS-ETF150Y65N is an integrated solution for a multi level
inverter stage in a single package. The EMIPAK 2B package
is easy to use thanks to the PressFit pins and the exposed
substrate provides improved thermal performance. The
optimized layout also helps to minimize stray parameters,
allowing for better EMI performance.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Operating junction temperature
Storage temperature range
RMS isolation voltage
Q1 to Q4 IGBT
Collector to emitter voltage
Gate to emitter voltage
Pulsed collector current
Clamped inductive load current
Continuous collector current
V
CES
V
GES
I
CM
I
LM
I
C
T
C
= 25 °C
T
C
= 60 °C
T
SINK
= 60 °C
T
C
= 25 °C
T
C
= 60 °C
650
20
450
180
201
171
77
600
460
650
750
161
140
74
319
245
V
A
SYMBOL
T
J
T
Stg
V
ISOL
TEST CONDITIONS
MAX.
175
-40 to +150
3500
UNITS
°C
V
T
J
= 25 °C, all terminals shorted, f = 50 Hz, t = 1 s
A
Power dissipation
D5 - D6 CLAMPING DIODE
Repetitive peak reverse voltage
Single pulse forward current
Diode continuous forward current
P
D
W
V
RRM
I
FSM
I
F
V
Power dissipation
P
D
10 ms sine or 6 ms rectangular pulse, T
J
= 25 °C
T
C
= 25 °C
T
C
= 60 °C
T
SINK
= 60 °C
T
C
= 25 °C
T
C
= 60 °C
A
W
PATENT(S):
www.vishay.com/patents
This Vishay product is protected by one or more United States and International patents.
Revision: 03-May-2018
Document Number: 95989
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000

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