SY89847UMG datasheet, PDF - EEWORLD Datasheet

SY89847UMG: DescriptionClock Multiplexer 5-OUT 2-IN 1:5 32-Pin QFN EP Tube; File Size1MB，24 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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SY89847UMG Overview

Clock Multiplexer 5-OUT 2-IN 1:5 32-Pin QFN EP Tube

SY89847UMG Parametric

Parameter Name	Attribute value
EU restricts the use of certain hazardous substances	Compliant
ECCN (US)	EAR99
Part Status	Active
HTS	8542.39.00.01
Type	Clock Multiplexer
Fanout	1:5
Number of Outputs per Chip	5
Maximum Propagation Delay Time @ Maximum CL (ns)	1.1@2.5V
Absolute Propagation Delay Time (ns)	1.1
Maximum Duty Cycle	55%
Input Logic Level	PECL\|LVDS\|CML
Output Logic Level	LVDS
Minimum Operating Supply Voltage (V)	2.375
Typical Operating Supply Voltage (V)	2.5
Maximum Operating Supply Voltage (V)	2.625
Maximum Quiescent Current (mA)	130
Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	85
Supplier Temperature Grade	Industrial
Packaging	Tube
Pin Count	32
Standard Package Name	QFN
Supplier Package	QFN EP
Mounting	Surface Mount
Package Height	0.85(Max)
Package Length	5
Package Width	5
PCB changed	32
Lead Shape	No Lead

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SY89847U

1.5 GHz Precision LVDS 1:5 Fanout with 2:1 MUX

and Fail Safe Input with Internal Termination

Features

• Selects Between Two Sources and Provides 5

Precision LVDS Copies

• Fail Safe Input Prevents Outputs from Oscillating

when Input is Invalid

• Guaranteed AC Performance over Temperature

and Supply Voltage:

- DC-to >1.5 GHz Throughput

- <1000 ps Propagation Delay (IN-to-Q)

- <210 ps Rise/Fall Times

• Ultra-Low Jitter Design:

- <1 ps

RMS

Random Jitter

- <1 ps

RMS

Cycle-to-Cycle Jitter

- <10 ps

Total Jitter (Clock)

- <0.7 ps

RMS

MUX Crosstalk Induced Jitter

• Unique, Patented MUX Input Isolation Design

Minimizes Adjacent Channel Crosstalk

• Unique, Patented Internal Termination and V

Accepts DC- and AC-Coupled Inputs (CML,

PECL, LVDS)

• Wide Input Voltage Range V

to GND

• 2.5V ±5% Supply Voltage

• –40°C to +85°C Industrial Temperature Range

• Available in 32-Pin (5 mm x 5 mm) QFN Package

General Description

The SY89847U is a 2.5V, 1:5 LVDS fanout buffer with a

2:1 differential input multiplexer (MUX). A unique fail

safe input (FSI) protection prevents metastable output

conditions when the selected input clock fails to a DC

voltage (voltage between the pins of the differential

input drops significantly below 100 mV).

The differential input includes Microchip’s unique, 3-pin

internal termination architecture that can interface to

any differential signal (AC- or DC-coupled) as small as

100 mV (200 mV

) without any level shifting or

termination resistor networks in the signal path. The

outputs are LVDS compatible with very fast rise/fall

times guaranteed to be less than 210 ps.

The SY89847U operates from a 2.5V ±5% supply and

is guaranteed over the full industrial temperature range

of –40°C to +85°C. The SY89847U is part of

Microchip’s high-speed, Precision Edge

product line.

Package Type

SY89847U

5 mm x 5 mm QFN-32 (M)

(Top View)

• Fail Safe Clock Protection

• Ultra-Low Jitter LVDS Clock Distribution

• Rack-Based Telecom/Datacom

32 31 30 29 28 27 26 25

Markets

•

LAN/WAN

Enterprise Servers

ATE

Test and Measurement

VT0

IN0

/IN0

SEL

IN1

/IN1

VT1

10 11 12 13 14

15 16

VCC

Applications

VREF-AC0

GND

VCC

/Q0

/Q1

VCC

/Q2

VCC

/Q3

VREF-AC1

GND

VCC

/Q4

United States Patent Nos. RE44,134 and 7,123,074



2018 Microchip Technology Inc.

DS20006101A-page 1

VCC

SY89847U

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †

Supply Voltage (V

) ................................................................................................................................ –0.5V to +4.0V

Input Voltage (V

) ....................................................................................................................................... –0.5V to V

LVPECL Output Current (I

OUT

)

Continuous ...................................................................................................................................................50 mA

Surge .........................................................................................................................................................100 mA

Current (V

)

Source or Sink on V

Pin ......................................................................................................................... ±100 mA

Input Current

Source or Sink Current on IN, /IN .............................................................................................................. ±50 mA

Current (V

REF

)

Source or Sink Current on V

REF-AC

(Note

1)............................................................................................

±0.5 mA

Operating Ratings ††

Supply Voltage (V

) ........................................................................................................................ +2.375V to +2.625V

† Notice:

Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only

and functional operation is not implied at conditions other than those detailed in the operational sections of this data

sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.

†† Notice:

The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.

Note 1:

Due to the limited drive capability, use for input of the same package only.



2018 Microchip Technology Inc.

DS20006101A-page 3

SY89847UMG Related Products

	SY89847UMG	SY89847UMG-TR
Description	Clock Multiplexer 5-OUT 2-IN 1:5 32-Pin QFN EP Tube	Clock Multiplexer 5-OUT 2-IN 1:5 32-Pin QFN EP T/R
EU restricts the use of certain hazardous substances	Compliant	Compliant
ECCN (US)	EAR99	EAR99
Part Status	Active	Active
HTS	8542.39.00.01	8542.39.00.01
Type	Clock Multiplexer	Clock Multiplexer
Fanout	1:5	1:5
Number of Outputs per Chip	5	5
Maximum Propagation Delay Time @ Maximum CL (ns)	1.1@2.5V	1.1@2.5V
Absolute Propagation Delay Time (ns)	1.1	1.1
Maximum Duty Cycle	55%	55%
Input Logic Level	PECL\|LVDS\|CML	CML\|LVDS\|PECL
Output Logic Level	LVDS	LVDS
Minimum Operating Supply Voltage (V)	2.375	2.375
Typical Operating Supply Voltage (V)	2.5	2.5
Maximum Operating Supply Voltage (V)	2.625	2.625
Maximum Quiescent Current (mA)	130	130
Minimum Operating Temperature (°C)	-40	-40
Maximum Operating Temperature (°C)	85	85
Supplier Temperature Grade	Industrial	Industrial
Packaging	Tube	Tape and Reel
Pin Count	32	32
Standard Package Name	QFN	QFN
Supplier Package	QFN EP	QFN EP
Mounting	Surface Mount	Surface Mount
Package Height	0.85(Max)	0.85(Max)
Package Length	5	5
Package Width	5	5
PCB changed	32	32
Lead Shape	No Lead	No Lead

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