MC10ELT20, MC100ELT20
5V TTL to Differential PECL
Translator
Description
The MC10ELT/100ELT20 is a TTL to differential PECL translator.
Because PECL (Positive ECL) levels are used, only +5 V and ground
are required. The small outline 8-lead package and the single gate of
the ELT20 makes it ideal for those applications where space,
performance, and low power are at a premium.
The 100 Series contains temperature compensation.
Features
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MARKING DIAGRAMS*
8
1
SO−8
D SUFFIX
CASE 751
1
8
HLT20
ALYW
G
8
KLT20
ALYW
G
•
•
•
•
•
1.2 ns Typical Propagation Delay
PNP TTL Inputs for Minimal Loading
Flow Through Pinouts
Operating Range: V
CC
= 4.75 V to 5.25 V with GND = 0 V
Pb−Free Packages are Available
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HT20
ALYWG
G
8
KT20
ALYWG
G
1
1
5B MG
G
DFN8
MN SUFFIX
CASE 506AA
H
K
5B
2P
= MC10
= MC100
= MC10
= MC100
A
L
Y
W
M
G
1
4
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2008
August, 2008
−
Rev. 6
1
Publication Order Number:
MC10ELT20/D
2P MG
G
4
MC10ELT20, MC100ELT20
NC
1
TTL
PECL
Q
3
6 NC
8 V
CC
7 D
Table 1. PIN DESCRIPTION
Pin
Q, Q
D
V
CC
GND
NC
EP
Function
PECL Differential Outputs*
TTL Input
Positive Supply
Ground
No Connect
(DFN8 only) Thermal exposed pad must be con-
nected to a sufficient thermal conduit. Electrically
connect to the most negative supply (GND) or
leave unconnected, floating open.
Q
2
NC
4
5 GND
Figure 1. 8−Lead Pinout
(Top View)
and Logic Diagram
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
*Output state undetermined when inputs are open.
Value
N/A
N/A
Human Body Model
Machine Model
Pb Pkg
Level 1
Level 1
Level 1
> 4 kV
> 200 V
Pb−Free Pkg
Level 1
Level 3
Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SO−8
TSSOP−8
DFN8
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
51 Devices
Table 3. MAXIMUM RATINGS
Symbol
V
CC
V
IN
I
out
T
A
T
stg
q
JA
q
JC
q
JA
q
JC
q
JA
T
sol
q
JC
Parameter
Positive Power Supply
Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Pb
Pb−Free
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
< 3 s @ 248°C
< 3 s @ 260°C
(Note 2)
DFN8
SO−8
SO−8
SO−8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
Condition 1
GND = 0 V
GND = 0 V
Continuous
Surge
V
I
V
CC
Condition 2
Rating
7
7
50
100
−40
to +85
−65
to +150
190
130
41 to 44
185
140
41 to 44
129
84
265
265
35 to 40
Unit
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
°C/W
Thermal Resistance (Junction−to−Case)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board
−
2S2P (2 signal, 2 power)
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2
MC10ELT20, MC100ELT20
Table 4. 10ELT SERIES PECL DC CHARACTERISTICS
V
CC
= 5.0 V; GND = 0.0 V (Note 3)
−40°C
Symbol
I
CC
V
OH
V
OL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 4)
Output LOW Voltage (Note 4)
3920
3050
4010
3200
Min
Typ
Max
16
4110
3350
4020
3050
4105
3210
Min
25°C
Typ
Max
16
4190
3370
4090
3050
4185
3227
Min
85°C
Typ
Max
16
4280
3405
Unit
mA
mV
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Output parameters vary 1:1 with V
CC
. V
CC
can vary
±0.25
V.
4. Outputs are terminated through a 50
W
resistor to V
CC
−
2 V.
Table 5. 100ELT SERIES PECL DC CHARACTERISTICS
V
CC
= 5.0 V; GND = 0.0 V (Note 5)
−40°C
Symbol
I
CC
V
OH
V
OL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 6)
Output LOW Voltage (Note 6)
Input HIGH Current
Input LOW Current
0.5
3915
3170
3995
3305
Min
Typ
Max
16
4120
3445
150
0.5
3975
3190
4045
3295
Min
25°C
Typ
Max
16
4120
3380
150
0.5
3975
3190
4050
3295
Min
85°C
Typ
Max
16
4120
3380
150
Unit
mA
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Output parameters vary 1:1 with V
CC
. V
CC
can vary
±0.25
V.
6. Outputs are terminated through a 50
W
resistor to V
CC
−
2 V.
Table 6. TTL INPUT DC CHARACTERISTICS
V
CC
= 4.7 V to 5.27 V; T
A
=
−40°C
to 85°C
Symbol
I
IH
I
IHH
I
IL
V
IK
V
IH
V
IL
Characteristic
Input HIGH Current
Input HIGH Current
Input LOW Current
Input Clamp Diode Voltage
Input HIGH Voltage
Input LOW Voltage
Condition
V
IN
= 2.7 V
V
IN
= 7.0 V
V
IN
= 0.5 V
I
IN
=
−18
mA
2.0
0.8
Min
Typ
Max
20
100
−0.6
−1.2
Unit
mA
mA
mA
V
V
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC10ELT20, MC100ELT20
Table 7. AC CHARACTERISTICS
V
CC
= 4.75 V to 5.25 V; GND = 0.0 V
−40°C
Symbol
f
max
t
PLH
t
PHL
t
JITTER
t
r
/t
f
Characteristic
Maximum Toggle Frequency
Propagation Delay
1.5 V to 50%
Propagation Delay
1.5 V to 50%
Cycle−to−Cycle Jitter
Output Rise/Fall Time
(20−80%)
0.15
Min
100
0.6
0.4
TBD
1.5
0.15
0.82
1.2
1.0
Typ
Max
Min
100
0.6
0.5
0.82
0.8
TBD
1.5
0.15
1.25
1.1
25°C
Typ
Max
Min
100
0.6
0.7
TBD
1.5
0.83
1.35
1.30
85°C
Typ
Max
Unit
MHz
ns
ns
ps
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Q
Driver
Device
Q
Z
o
= 50
W
D
Receiver
Device
Z
o
= 50
W
50
W
50
W
D
V
TT
V
TT
= V
CC
−
2.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
−
Termination of ECL Logic Devices.)
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MC10ELT20, MC100ELT20
ORDERING INFORMATION
Device
MC10ELT20D
MC10ELT20DG
MC10ELT20DR2
MC10ELT20DR2G
MC10ELT20DT
MC10ELT20DTG
MC10ELT20DTR2
MC10ELT20DTR2G
MC10ELT20MNR4
MC10ELT20MNR4G
MC100ELT20D
MC100ELT20DG
MC100ELT20DR2
MC100ELT20DR2G
MC100ELT20DT
MC100ELT20DTG
MC100ELT20DTR2
MC100ELT20DTR2G
MC100ELT20MNR4
MC100ELT20MNR4G
Package
SO−8
SO−8
(Pb−Free)
SO−8
SO−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
DFN8
DFN8
(Pb−Free)
SO−8
SO−8
(Pb−Free)
SO−8
SO−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
DFN8
DFN8
(Pb−Free)
Shipping
†
98 Units / Rail
98 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
100 Units / Rail
100 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
1000 / Tape & Reel
1000 / Tape & Reel
98 Units / Rail
98 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
100 Units / Rail
100 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
1000 / Tape & Reel
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
ECL Clock Distribution Techniques
−
Designing with PECL (ECL at +5.0 V)
−
ECLinPSt I/O SPiCE Modeling Kit
−
Metastability and the ECLinPS Family
−
Interfacing Between LVDS and ECL
−
The ECL Translator Guide
−
Odd Number Counters Design
−
Marking and Date Codes
−
Termination of ECL Logic Devices
−
Interfacing with ECLinPS
−
AC Characteristics of ECL Devices
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