MTCH650/2
Programmable Voltage Boost with Built-in Level Shifters
and Serial Interface with Output Enable
MTCH652 Features:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
19 High Voltage I/O Lines
Built-in Boost
Internal Switch
1.8V to 5.5V Input Operating Range
Low Quiescent Current: <200 µA
Low Shutdown Current: 1.5 µA, typical
Up to 50 mA Output Current, at V
IN
= 3.6V and
V
OUT
= 12V
The Boost is Driven by an External PWM Allowing
for Greater Boost Flexibility
Selectable Output Voltage Range: 6V, 8V, 10V,
12V, 14V, 16V and 18V
Selectable Current Limiting
Selectable Soft Start
High-Speed SPI Interface:
- 1 MHz max.
Output Enable (OE) Independent of SPI Interface
Built-in Discharge Circuit
MTCH650 Features:
•
•
•
•
•
21 High Voltage I/O lines
1.8V to 5.5V Input Operating Range
Low Quiescent Current: <200 µA
Low Shutdown Current: 1.5 µA typical
Up to 100 mA Output Current with 5 mA per
OUTxx Channel
• Output Enable (OE) Independent of SPI Interface
• 3.6 to 18V External V
PPIN
Range
Package Type:
• 28-pin SOIC, SSOP
• 28-pin UQFN (4x4)
FIGURE 1:
28-PIN SOIC, SSOP DIAGRAM
OUT03
OUT02
OUT01
OUT00
OUT19 /OUT18
(1)
(2)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OUT20
(1)
/LC
(2)
OUT04
OUT05
OUT06
OUT07
V
PP
(2)
/V
PPIN
(1)
V
DD
V
SS
OUT08
OUT09
OUT10
OUT11
OUT12
OUT13
OUT18
(1)
/OUT17
(2)
OUT17
(1)
/OSCIN
(2)
OE
LE
DIN
CLK
OUT16
OUT15
OUT14
Note 1:
MTCH650
2:
MTCH652
2014 Microchip Technology Inc.
Preliminary
MTCH650/2
DS40001749A-page 1
MTCH650/2
FIGURE 2:
28-PIN UQFN DIAGRAM
OUT06
OUT07
V
PP
(2)
/V
PPIN
(1)
V
DD
V
SS
OUT08
OUT09
28
27
26
25
24
23
22
OUT05
OUT04
(1)
OUT20 /LC
(2)
OUT03
OUT02
OUT01
OUT00
Note 1:
MTCH650
2:
MTCH652
OUT19
(1)
/OUT18
(2)
8
OUT18
(1)
/OUT17
(2)
9
OUT17
(1)
/OSCIN
(2)
10
OE 11
LE 12
DIN 13
CLK 14
1
2
3
4
5
6
7
MTCH650/2
21 OUT10
20 OUT11
19 OUT12
18 OUT13
17 OUT14
16 OUT15
15 OUT16
DS40001749A-page 2
Preliminary
2014 Microchip Technology Inc.
MTCH650/2
TABLE 1:
I/O
Vss
V
DD
V
PP
V
PPIN
LC
OE
LE
DIN
CLK
OSCIN
OUT00
OUT01
OUT02
OUT03
OUT04
OUT05
OUT06
OUT07
OUT08
OUT09
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
OUT17
OUT18
OUT19
OUT20
PIN FUNCTION TABLE FOR MTCH650
28-Pin SOIC/SSOP
21
22
—
23
—
8
9
10
11
—
4
3
2
1
27
26
25
24
20
19
18
17
16
15
14
13
12
7
6
5
28
28-Pin UQFN
24
25
—
26
—
11
12
13
14
—
7
6
5
4
2
1
28
27
23
22
21
20
19
18
17
16
15
10
9
8
3
Description
Electrical ground or GND
Input Voltage Pin
Boost Voltage Output
Boost Voltage Input
Inductor Boost Connection
Digital Input (ST)
Digital Input (ST)
Digital Input (ST)
Digital Input (TTL)
Digital Input (TTL)
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
INPUT VOLTAGE (V
DD
)
Connect the input voltage to V
DD
. This pin must be
decoupled to GND with a recommended 1 µf minimum
capacitor.
OUTPUT ENABLE INPUT (OE)
When OE is set to logic ‘0’, all output latches (OUTxx)
are GND. When OE is set to logic ‘1’, all output latches
that are set to drive ‘1’ will output the boost voltage
level. The OE state is ignored and all OUTxx are high-
impedance (High Z) during shutdown or soft-start
transient.
BOOST VOLTAGE INPUT (V
PPIN
)
Boost input voltage must be decoupled to GND with
recommended 1 µf minimum capacitor.
2014 Microchip Technology Inc.
Preliminary
DS40001749A-page 3
MTCH650/2
LATCH ENABLE INPUT (LE)
Latch Enable Input (LE) is the active-low latch input
used for latching-in serial data. Serial data is ignored
unless LE is logic ‘0’. After clocking serial data, the data
is internally latched when LE changes from logic ‘0’ to
logic ‘1’.
SERIAL DATA INPUT (DIN)
Serial data input.
SERIAL DATA CLOCK INPUT (CLK)
Serial data clock input.
HV OUTPUT (OUTXX)
High-voltage output pins.
DS40001749A-page 4
Preliminary
2014 Microchip Technology Inc.
MTCH650/2
TABLE 2:
I/O
Vss
V
DD
V
PP
V
PPIN
LC
OE
LE
DIN
CLK
OSCIN
OUT00
OUT01
OUT02
OUT03
OUT04
OUT05
OUT06
OUT07
OUT08
OUT09
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
OUT17
OUT18
OUT19
OUT20
PIN FUNCTION TABLE FOR MTCH652
28-Pin SOIC/SSOP
21
22
23
—
28
8
9
10
11
7
4
3
2
1
27
26
25
24
20
19
18
17
16
15
14
13
12
6
5
—
—
28-Pin UQFN
24
25
26
—
3
11
12
13
14
10
7
6
5
4
2
1
28
27
23
22
21
20
19
18
17
16
15
9
8
—
—
Description
Electrical ground or GND
Input Voltage Pin
Boost Voltage Output
Boost Voltage Input
Inductor Boost Connection
Digital Input (ST)
Digital Input (ST)
Digital Input (ST)
Digital Input (TTL)
Digital Input (TTL)
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
HV Analog Output
INPUT VOLTAGE (V
DD
)
Connect the input voltage to V
DD
. This pin must be
decoupled to GND with a recommended 1 µf minimum
capacitor.
BOOST INDUCTOR INPUT (LC)
The Boost Inductor Input must be decoupled to GND
on the V
DD
side with a recommended 1 µf minimum
capacitor.
BOOST VOLTAGE OUTPUT (V
PP
)
Boost output voltage must be decoupled to GND with a
recommended 1 µf minimum capacitor.
2014 Microchip Technology Inc.
Preliminary
DS40001749A-page 5
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