SPC560P44L5CEFBY datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> SPC560P44L5CEFBY

SPC560P44L5CEFBY: DescriptionARM Microcontrollers - MCU MID MICROCONTROLLER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size881KB，112 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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ARM Microcontrollers - MCU MID MICROCONTROLLER

SPC560P44L5CEFBY Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	LQFP-144
Contacts	144
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Has ADC	YES
Address bus width	32
bit size	32
boundary scan	YES
CPU series	SPC56
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	YES
External data bus width	32
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	S-PQFP-G144
length	20 mm
low power mode	NO
Number of DMA channels	16
Number of external interrupt devices	32
Number of I/O lines	108
Number of serial I/Os
Number of terminals	144
On-chip program ROM width	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP144(UNSPEC)
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
RAM (bytes)	32768
rom(word)	393216
ROM programmability	FLASH
speed	60 MHz
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	20 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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SPC560P44L3, SPC560P44L5

SPC560P50L3, SPC560P50L5

32-bit Power Architecture

based MCU with 576 KB Flash memory

and 40 KB SRAM for automotive chassis and safety applications

Datasheet

−

production data

Features

■

64 MHz, single issue, 32-bit CPU core complex

(e200z0h)

– Compliant with Power Architecture

embedded category

– Variable Length Encoding (VLE)

Memory organization

– Up to 512 KB on-chip code flash memory

with ECC and erase/program controller

– Additional 64 (4 × 16) KB on-chip data flash

memory with ECC for EEPROM emulation

– Up to 40 KB on-chip SRAM with ECC

Fail safe protection

– Programmable watchdog timer

– Non-maskable interrupt

– Fault collection unit

Nexus L2+ interface

Interrupts

– 16-channel eDMA controller

– 16 priority level controller

General purpose I/Os individually

programmable as input, output or special

function

2 general purpose eTimer units

– 6 timers each with up/down count

capabilities

– 16-bit resolution, cascadable counters

– Quadrature decode with rotation direction

flag

– Double buffer input capture and output

compare

Communications interfaces

– 2 LINFlex channels (LIN 2.1)

– 4 DSPI channels with automatic chip select

generation

– 1 FlexCAN interface (2.0B Active) with 32

message objects

■

LQFP144 (20 x 20 x 1.4 mm)

LQFP100 (14 x 14 x 1.4 mm)

■

– 1 safety port based on FlexCAN with 32

message objects and up to 7.5 Mbit/s

capability; usable as second CAN when not

used as safety port

– 1 FlexRay™ module (V2.1) with selectable

dual or single channel support, 32

message objects and up to 10 Mbit/s

(512 KB device only)

■

Two 10-bit analog-to-digital converters (ADC)

– 2 × 11 input channels, + 4 shared channels

– Conversion time < 1 µs including sampling

time at full precision

– Programmable ADC Cross Triggering Unit

(CTU)

– 4 analog watchdogs with interrupt

capability

On-chip CAN/UART bootstrap loader with Boot

Assist Module (BAM)

1 FlexPWM unit: 8 complementary or

independent outputs with ADC synchronization

signals

Device summary

Part number

■

Table 1.

Package

448 KB Flash

LQFP144 SPC560P44L5

LQFP100 SPC560P44L3

576 KB Flash

SPC560P50L5

SPC560P50L3

■

September 2013

This is information on a product in full production.

Doc ID 14723 Rev 9

1/112

www.st.com

Contents

SPC560P44Lx, SPC560P50Lx

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1

1.2

1.3

1.4

1.5

Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1.5.1

1.5.2

1.5.3

1.5.4

1.5.5

1.5.6

1.5.7

1.5.8

1.5.9

1.5.10

1.5.11

1.5.12

1.5.13

1.5.14

1.5.15

1.5.16

1.5.17

1.5.18

1.5.19

1.5.20

1.5.21

1.5.22

1.5.23

1.5.24

1.5.25

1.5.26

1.5.27

1.5.28

High performance e200z0 core processor . . . . . . . . . . . . . . . . . . . . . . . 13

Crossbar switch (XBAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Enhanced direct memory access (eDMA) . . . . . . . . . . . . . . . . . . . . . . . 14

Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Static random access memory (SRAM) . . . . . . . . . . . . . . . . . . . . . . . . . 15

Interrupt controller (INTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

System status and configuration module (SSCM) . . . . . . . . . . . . . . . . . 16

System clocks and clock generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Frequency-modulated phase-locked loop (FMPLL) . . . . . . . . . . . . . . . . 17

Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Internal RC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Periodic interrupt timer (PIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

System timer module (STM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Software watchdog timer (SWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Fault collection unit (FCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

System integration unit – Lite (SIUL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Boot and censorship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Error correction status module (ECSM) . . . . . . . . . . . . . . . . . . . . . . . . . 19

Peripheral bridge (PBRIDGE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Controller area network (FlexCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Safety port (FlexCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

FlexRay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Serial communication interface module (LINFlex) . . . . . . . . . . . . . . . . . 22

Deserial serial peripheral interface (DSPI) . . . . . . . . . . . . . . . . . . . . . . 23

Pulse width modulator (FlexPWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

eTimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Analog-to-digital converter (ADC) module . . . . . . . . . . . . . . . . . . . . . . . 25

Cross triggering unit (CTU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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1.5.29

1.5.30

1.5.31

1.5.32

Contents

Nexus development interface (NDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Cyclic redundancy check (CRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

IEEE 1149.1 JTAG controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

On-chip voltage regulator (VREG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . 29

2.1

2.2

Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2.2.1

2.2.2

2.2.3

Power supply and reference voltage pins . . . . . . . . . . . . . . . . . . . . . . . 31

System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

3.1

3.2

3.3

3.4

3.5

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

3.5.1

3.5.2

Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

General notes for specifications at maximum junction temperature . . . 57

3.6

3.7

3.8

Electromagnetic interference (EMI) characteristics . . . . . . . . . . . . . . . . . 59

Electrostatic discharge (ESD) characteristics . . . . . . . . . . . . . . . . . . . . . 59

Power management electrical characteristics . . . . . . . . . . . . . . . . . . . . . 59

3.8.1

3.8.2

Voltage regulator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 59

Voltage monitor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 63

3.9

3.10

Power up/down sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

3.10.1

3.10.2

3.10.3

3.10.4

3.10.5

NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

DC electrical characteristics (5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

DC electrical characteristics (3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Input DC electrical characteristics definition . . . . . . . . . . . . . . . . . . . . . 69

I/O pad current specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

3.11

3.12

3.13

Main oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 75

FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

16 MHz RC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . 78

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Contents

SPC560P44Lx, SPC560P50Lx

3.14

Analog-to-digital converter (ADC) electrical characteristics . . . . . . . . . . . 78

3.14.1

3.14.2

Input impedance and ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

ADC conversion characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

3.15

3.16

3.17

Flash memory electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 85

AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

3.16.1

Pad AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

3.17.1

3.17.2

3.17.3

3.17.4

3.17.5

RESET pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

IEEE 1149.1 interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Nexus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

External interrupt timing (IRQ pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

4.1

4.2

ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

4.2.1

4.2.2

LQFP144 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . 101

LQFP100 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . 103

Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Appendix A Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

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List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Table 44.

Table 45.

Table 46.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

SPC560P44Lx, SPC560P50Lx device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

SPC560P44Lx, SPC560P50Lx device configuration differences . . . . . . . . . . . . . . . . . . . . . 8

SPC560P44Lx, SPC560P50Lx series block summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Parameter classifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Recommended operating conditions (5.0 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Recommended operating conditions (3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Thermal characteristics for 144-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Thermal characteristics for 100-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

EMI testing specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

ESD ratings, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Approved NPN ballast components (configuration with resistor on base) . . . . . . . . . . . . . 60

Voltage regulator electrical characteristics (configuration with resistor on base) . . . . . . . . 61

Voltage regulator electrical characteristics (configuration without resistor on base) . . . . . 62

Low voltage monitor electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

PAD3V5V field description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

DC electrical characteristics (5.0 V, NVUSRO[PAD3V5V] = 0) . . . . . . . . . . . . . . . . . . . . . 66

Supply current (5.0 V, NVUSRO[PAD3V5V] = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

DC electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1) . . . . . . . . . . . . . . . . . . . . . 67

Supply current (3.3 V, NVUSRO[PAD3V5V] = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

I/O supply segment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

I/O weight . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

I/O consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Main oscillator output electrical characteristics (5.0 V, NVUSRO[PAD3V5V] = 0) . . . . . . . 75

Main oscillator output electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1) . . . . . . . 76

Input clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

16 MHz RC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

ADC conversion characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Program and erase specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Flash memory module life. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Flash memory read access timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Output pin transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

RESET electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

JTAG pin AC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Nexus debug port timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

External interrupt timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

DSPI timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

LQFP144 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

LQFP100 package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Doc ID 14723 Rev 9

5/112

SPC560P44L5CEFBY Related Products

	SPC560P44L5CEFBY	SPC560P50L3CEFBY	SPC560P44L5CEFAY	102A0.240T	SPC560P44L3CEFAY	SPC560P44L5CEFAR	SPC560P44L3BEAAR	SPC560P50L5BEAAY	SPC560P50L3B1ABY	SPC560P44L3CEABR
Description	ARM Microcontrollers - MCU MID MICROCONTROLLER	32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis	ARM Microcontrollers - MCU MID MICROCONTROLLER	Fixed Resistor, Wire Wound	ARM Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis	ARM Microcontrollers - MCU MID MICROCONTROLLER	ARM Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis	32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis	32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis	ARM Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis
Reach Compliance Code	compliant	compliant	compliant	unknown	compliant	compliant	-	-	-	-
ECCN code	3A991.A.2	3A991.A.2	3A991.A.2	EAR99	3A991.A.2	3A991.A.2	-	-	-	-
Number of terminals	144	100	144	2	100	144	-	-	-	-
technology	CMOS	CMOS	CMOS	WIRE WOUND	CMOS	CMOS	-	-	-	-

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