EEWORLDEEWORLDEEWORLD

Part Number

Search

ZL2005PALRFT

Description
Switching Controllers DIGTL DC-DC CNTRLR W/DRVRS
Categorysemiconductor    Power management   
File Size1MB,41 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet Parametric View All

ZL2005PALRFT Online Shopping

Suppliers Part Number Price MOQ In stock  
ZL2005PALRFT - - View Buy Now

ZL2005PALRFT Overview

Switching Controllers DIGTL DC-DC CNTRLR W/DRVRS

ZL2005PALRFT Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerIntersil ( Renesas )
Product CategorySwitching Controllers
RoHSDetails
PackagingReel
Moisture SensitiveYes
Factory Pack Quantity100
ZL2005P
NOT RECOMMENDED FOR NEW DESIGNS
RECOMMENDED REPLACEMENT PART
ZL6100
DATASHEET
FN6849
Rev 3.00
December 16, 2011
Digital-DC™ Controller with Drivers and POLA/DOSA Trim
Description
The ZL2005P is an innovative mixed-signal power
conversion and management IC that combines a com-
pact, efficient, synchronous DC-DC buck controller,
adaptive drivers and key power and thermal manage-
ment functions in one IC, providing flexibility and
scalability while decreasing board space requirements
and design complexity. Zilker Labs Digital-DC tech-
nology enables a unique blend of performance and
features not available in either traditional analog or
newer digital approaches, resolving the issues associ-
ated with providing multiple low-voltage power
domains on a single PCB.
The ZL2005P is designed to be configured either as a
standard ZL2005 or as POLA/DOSA compatible
device.
All operating features can be configured by simple
pin-strap selection, resistor selection or through the
on-board serial port. The PMBus™-compliant
ZL2005P uses the SMBus™ serial interface for com-
munication with other Digital-DC products or a host
controller.
Features Power Conversion
• Efficient synchronous buck controller
• 3 V to 14 V input range
• 0.54 V to 5.5 V output range (with margin)
• Optional output voltage setting with VADJ pin
• ± 1% output accuracy
• Internal 3 A drivers support >40 A power stage
• Fast load transient response
• Phase interleaving
• RoHS compliant (6 x 6 mm) QFN package
Power Management
• Digital soft start/stop
• Precision delay and ramp-up
• Voltage tracking, sequencing and margining
• Voltage/current/temperature monitoring
• I
2
C/SMBus communication
• Output overvoltage and overcurrent protection
• Internal non-voltatile memory (NVM)
• PMBus compliant
Applications
Servers/storage equipment
Telecom/datacom equipment
Power supplies (memory, DSP, ASIC, FPGA)
DLY FC ILIM
EN PG (0,1) (0,1) (0,1) CFG UVLO V25 VR VDD
SS (0,1)
VTRK
MGN
SYNC
VADJ
POWER
MANAGEMENT
LDO
BST
GH
SW
GL
ISENA
ISENB
DRIVER
NON-
VOLATILE
MEMORY
PWM
CONTROLLER
CURRENT
SENSE
TEMP
SENSOR
SCL
SDA
SALRT
I
2
C
MONITOR
ADC
SA (0,1)
XTEMP VSEN
PGND SGND DGND
Figure 1. Block Diagram
FN6849 Rev 3.00
December 16, 2011
Page 1 of 41
fpga AS download is successful, but FPGA configuration is unsuccessful upon power on
I need help from you guys: I can successfully download to EPCS4 via USB cable, the download bar on QII shows 100%. However, loading the configuration from EPCS4 is still unsuccessful when powering on....
kf_nyh FPGA/CPLD
I burned a stmf103 minimum board today
I used stm32 to send pwm to A3947 to control the stepper motor. I didn't use optocoupler isolation. I directly connected the GND of the microcontroller to the GND of the DC 24V, because I needed to us...
vincent.liu stm32/stm8
Who can analyze the possible questions for this year’s higher vocational exams?
[i=s]This post was last edited by paulhyde on 2014-9-15 03:34[/i] Temperature controlled motor?...
wytopkk Electronics Design Contest
【Show samples】+ Receive samples+ Application process
TI sample application is that simple. It is very smooth to fill it out step by step. The process is as follows: First, feel the forum activity [size=14px][url=https://bbs.eeworld.com.cn/thread-442742-...
ou513 TI Technology Forum
How to solve the problem of many warnings like this in Keil C compilation? ? ? function "Gpio_Set" declared implicitly
source\App_Rtc8025.c(32): warning: #223-D: function "I2CWrite" declared implicitly source\App_Rtc8025.c(46): warning: #223-D: function "I2CRead" declared implicitly compiling App_24lc256.c.. . source\...
hy.rf Embedded System
ARM processor system initialization process
This question is excerpted from the book "Practical Guide to Linux Kernel Development in Embedded Systems (ARM Platform)". Every time the system is powered on/reset, the processor is in a state of min...
cd001 ARM Technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1830  892  1021  2565  426  37  18  21  52  9 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号