Frequency Generator with 200MHz Differential CPU Clocks
Recommended Application:
CK-408 clock for Brookdale/Odem/Montara-GM for P4/Banias
processor.
Output Features:
•
3 Differential CPU Clock Pairs @ 3.3V
•
7 PCI (3.3V) @ 33.3MHz including 2 early PCI clocks
•
3 PCI_F (3.3V) @ 33.3MHz
•
1 USB (3.3V) @ 48MHz, 1 DOT (3.3V) @ 48MHz
•
1 REF (3.3V) @ 14.318MHz
•
5 3V66 (3.3V) @ 66.6MHz
•
1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz
Features:
•
Provides standard frequencies and additional 3%, 5%
and 10% over-clocked frequencies
•
Supports spread spectrum modulation:
No spread, Center Spread (±0.3%, ±0.55%), or Down
Spread (-0.5%, -0.75%)
•
Offers adjustable PCI early clock via latch inputs
•
Selectable 1X or 2X strength for REF via I
2
C interface
•
Programmable group to group skew
•
Linear programmable frequency and spreading %
•
Efficient power management scheme through PD#,
CPU_STOP# and PCI_STOP#.
•
Uses external 14.318MHz crystal
•
Stop clocks and functional control available through
I
2
C interface.
Key Specifications:
•
CPU Output Jitter <150ps
•
3V66 Output Jitter <250ps
•
CPU Output Skew <100ps
Pin Configuration
VDDREF
X1
X2
GND
PCICLK_F0
PCICLK_F1
*ASEL/PCICLK_F2
VDDPCI
GND
PCICLK0
**E_PCICLK1/PCICLK1
PCICLK2
**E_PCICLK3/PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
PCICLK6
VDD3V66
GND
3V66_2
3V66_3
3V66_4
3V66_5
*PD#
VDDA
GND
Vtt_PWRGD#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
REF
FS1
FS0
CPU_STOP#*
CPUCLKT0
CPUCLKC0
VDDCPU
CPUCLKT1
CPUCLKC1
GND
VDDCPU
CPUCLKT2
CPUCLKC2
MULTSEL*
IREF
GND
PWRSAVE#*
48MHz_USB/FS2
**
48MHz_DOT
VDD48
GND
3V66_1/VCH_CLK/FS3
**
PCI_STOP#*
3V66_0/FS4
**
VDD3V66
GND
SCLK
SDATA
56-Pin 300mil SSOP
56-Pin 240mil TSSOP
*
These inputs have 120K internal pull-up resistors to VDD.
**
Internal pull-down resistors to ground.
Block Diagram
PLL2
48MHz_USB
48MHz_DOT
Functionality Table
FS1
0
FS0
0
1
0
1
CPU
MHz
100.00
133.33
200.00
166.66
AGP
MHz
66.67
66.67
66.67
66.66
PCI
MHz
33.33
33.33
33.33
33.33
X1
X2
XTAL
OSC
3V66 (5:2)
0
1
1
PLL1
Spread
Spectrum
PWRSAVE#
Vtt_PWRGD#
PD#
CPU_STOP#
PCI_STOP#
MULTSEL
FS (4:0)
SDATA
SCLK
0708—10/10/02
REF
CPU
DIVDER
Stop
3
3
CPUCLKT (2:0)
CPUCLKC (2:0)
PCICLK (6:0)
Asynchronous AGP/PCI Frequency Selection Table
Byte7 Bit5 Byte7 Bit4
0
0
0
1
1
0
1
1
AGP Frequency
66.00
75.43
88.00
--
PCI Frequency
33.00
37.72
44.00
--
Control
Logic
PCI
DIVDER
3V66
DIVDER
Stop
7
PCICLK_F (2:0)
3
3V66_0
Config.
Reg.
3V66_1/VCH_CLK
I REF
ADVANCE INFORMATION
documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.
ICS950813
ICS950813
Advance Information
Pin Description
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
PIN NAME
VDDREF
X1
X2
GND
PCICLK_F0
PCICLK_F1
*ASEL/PCICLK_F2
VDDPCI
GND
PCICLK0
**E_PCICLK1/PCICLK1
PCICLK2
**E_PCICLK3/PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
PCICLK6
VDD3V66
GND
3V66_2
3V66_3
3V66_4
3V66_5
*PD#
VDDA
GND
Vtt_PWRGD#
PIN TYPE
PWR
IN
OUT
PWR
OUT
OUT
I/O
PWR
PWR
OUT
I/O
OUT
I/O
PWR
PWR
OUT
OUT
OUT
PWR
PWR
OUT
OUT
OUT
OUT
IN
PWR
PWR
IN
DESCRIPTION
Ref, XTAL power supply, nominal 3.3V
Crystal input,nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
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