COMPANY CONFIDENTIAL
PI3A412
0.4Ω, 3.3V, Quad SPDT Analog Switch
Features
• CMOS Technology for Bus and Analog Applications
• Low On-Resistance: 0.4Ω (+2.7V Supply)
• Wide V
CC
Range: +1.6V to +4.2V ±10%
• I
CC
= 0.3µA @ T
A
= +25˚C
• Rail-to-Rail switching throughout Signal Range
• Fast Switching Speed: 20ns TYP. at 3.3V
• High Off Isolation: -65dB
• Crosstalk Rejection: -65dB
• Extended Industrial Temperature Range: –40
°
C to 85
°
C
• Packaging: ( Pb-free & Green)
– 16-contact TQFN (ZL), 2.5mm x 2.5mm
– 16-contact TQFN (ZH), 3.0mm x 3.0mm
Description
The PI3A412 is a quad single-pole double-throw (SPDT) CMOS
switch. It can be used as an analog switch or as a low-delay bus
switch. Specified over a wide operating power supply voltage
range, +1.6V to +4.2V, the switch has an On-Resistance of 0.4Ω
at 2.7V.
Control inputs, Ax, tolerates input drive signals up to 5V, indepen-
dent of supply voltage.
Block Diagram
½½½½
½½½
½½½
½½
½½½½
½½½
½½½
Applications
• Cell Phones
• PDAs
• Portable Instrumentation
• Battery Powered
Communications
• Computer Peripherals
• Audio & Video Signal Routing
• PCMCIA Cards
• Modems
• Hard Drives
• JTAG Testing
Pin Configuration
(top view)
COM
1
16
NO
1
15
NC
4
13
12
11
10
9
V
CC
14
½½½½
COM
4
NO
4
A
1
NC
3
½½
½½½½
½½½
½½½
NC
1
A
0
NO
2
COM
2
1
2
3
4
5
6
7
8
GND
½½½
½½½
NC
2
GND
NO
3
COM
3
06-0068
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PS8834
05/22/06
COMPANY CONFIDENTIAL
PI3A412
0.4Ω, 3.3V, Quad SPDT Analog Switch
Pin Description
Pin #
4, 8, 12, 16
1, 5, 9, 13
3, 7, 11, 15
2, 10
6
14
Notes
:
1. X = 1, 2, 3, or 4
Function Tables
Name
COM
X
NC
X
NO
X
A
0
, A
1
GND
V
CC
Description
Common Output / Data Port
Data Port (normally connect)
Data Port (normally open)
Logic Input Control
Ground
Positive Power Supply
A
0
Function
0
NC
X
Connected to
COM
X
1
NO
X
Connected to
COM
X
Notes
:
1. X = 1 or 2
2. Y = 3 or 4
A
1
Function
0 NC
Y
Connected to
COM
Y
1 NO
Y
Connected to
COM
Y
Absolute Maximum Ratings
Voltages Referenced to GND
V
CC
...................................................................... 1.5V to +4.6V
V
NOx
, V
NCx
, V
COMx,
V
Ax
+
+0.3V
or 30mA, whichever occurs first
Current (any terminal)................................................... ±200mA
Peak Current, V
NC +
V
NO
(Pulsed at 1ms, 10% duty cycle)................................... ±400mA
(1)
.......................–0.5V to V
Thermal Information
Continuous Power Dissipation
16-pin Thin QFN (derate 7.1mW/ºC above +70ºC)............ 0.5W
Storage Temperature ........................................ –65ºC to +150ºC
Lead Temperature (soldering, 10s) ................................. +300ºC
Note
1: Signals on NC, NO, COM, or A exceeding V
CC
or GND are clamped by internal diodes. Limit forward diode current to 30mA.
Caution:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of
this specification is not implied.
06-0068
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PS8834
05/22/06
COMPANY CONFIDENTIAL
PI3A412
0.4Ω, 3.3V, Quad SPDT Analog Switch
Electrical Specifications - Single +3.3V Supply
Parameter
Analog Signal Range
(3)
On Resistance
On-Resistance Match
Between Channels
(4)
On-Resistance Flatness
(5)
Off Leakage Current
(6)
(V
CC
= +3.3V ± 10%, GND = 0V, V
IH
= 1.3V, V
IL
= 0.5V) (T
A
= –40°C to +85°C)
Symbol
V
ANALOG
R
ON
∆R
ON
R
FLAT(ON)
I
NC
(off)
or
I
NO
(off)
I
COMx (on)
V
CC
= 2.7V, I
COM
= 100mA,
V
IN
= +1.5V
V
CC
= 2.7V, I
COMx
= 100mA,
V
IN
= 0.8V, 2.0V
V
CC
= 3.6V
V
NO
or V
NC
= 0.3V, 3.3V
V
CC
= 3.6V,
V
COMx
= 0.3V, 3.3V
Conditions
0
Min.
(1)
Typ.
(2)
0.4
0.08
0.1
Max.
(1)
Units
V
CC
0.6
0.09
0.15
400
nA
400
Ω
V
-400
-400
On Leakage Current
(6)
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are T
A
= 25°C, V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4.
∆R
ON
= R
ON
match between channels
5. Flatness is defined as the difference between the maximum and minimum value of On-Resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
Electrical Specifications - Single +4.2V Supply
Parameter
Analog Signal Range
(3)
On Resistance
On-Resistance Match
Between Channels
(4)
On-Resistance Flatness
(5)
Off Leakage
Current
(6)
Symbol
V
ANALOG
R
ON
∆R
ON
R
FLAT(ON)
I
NC
(off)
or
I
NO
(off)
I
COMx
(on)
(V
CC
= +4.2V ± 10%, GND = 0V, V
IH
= 1.6V, V
IL
= 0.7V) (T
A
= –40°C to +85°C)
Conditions
0
V
CC
= 4.0V, I
COMx
= 100mA,
V
IN
= +1.5V
V
CC
= 4.0V, I
COMx
= 100mA,
V
IN
= 0.8V, 2.0V
V
CC
= 4.4V,
V
NO
or V
NC
= 0.3V, 3.3V
V
CC
= 4.4V,
V
COMx
= 0.3V, 3.3V
Min.
(1)
Typ.
(2)
0.4
0.08
0.1
Max.
(1)
Units
V
CC
0.6
0.09
0.15
400
nA
400
Ω
V
-400
-400
On Leakage Current
(6)
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values ar
e T
A
= 25°C, V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4.
∆R
ON
= R
ON
match between channels
5. Flatness is defined as the difference between the maximum and minimum value of On-Resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
06-0068
3
PS8834
05/22/06
COMPANY CONFIDENTIAL
PI3A412
0.4Ω, 3.3V, Quad SPDT Analog Switch
Electrical Specifications - Single +4.2V Supply
Description
Logic Input
Input High Voltage
Input Low Voltage
Input Current with Voltage High
Input Current with Voltage Low
Dynamic
Turn-On Time
Turn-Off Time
Break-Before-Make
Charge Injection
(3)
Off Isolation
(4)
Cross Talk
(5)
3dB Bandwidth
Off Capacitance
Off Capacitance
On Capacitance
Supply
Power-Supply Range
Positve Supply Current
V
CC
I
CC
V
CC
= 4.2V, V
A
= 0V or V
CC
1.5
0.5
4.4
V
µA
t
ON
t
OFF
t
BBM
Q
O
IRR
X
TALK
f
3db
C
NC(OFF)
C
NO(OFF)
C
ON
V
CC
= 4.2V, V
COM
= 2.0V, Figure 1 & 2
V
IN
= 1.5V,
R
L
= 50Ω,
C
L
= 35pF, See Figure 3
C
L
= 1nF, V
GEN
= 0V,
R
GEN
= 0Ω, Figure 4
R
L
= 50Ω, f = 100kHz, Figure 5
R
L
= 50Ω, f = 100kHz, Figure 6
See Test Circuit Figure 9
f = 1 MHz, Figure 7
f = 1 MHz, Figure 8
1
20
12
12
100
-65
-65
40
50
50
135
pF
25
15
15
pC
dB
MHz
ns
V
IH
V
IL
I
AH
I
AL
Guaranteed logic High Level
Guaranteed logic Low Level
V
A
= 1.4V, all others = 0.5V
V
A
= 0.5V, all other = 1.4V
–1
–1
1.6
0.7
1
1
V
µA
Parameter
(V
CC
= +4.2V ± 10%, GND = 0V, V
IH
= 1.6V, V
IL
= 0.7V) (T
A
= –40°C to +85°C)
Test Conditions
Min.
(1)
Typ.
(2)
Max.
(1)
Unit
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are T
A
= 25°C, V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4. Off Isolation = 20log
10
[ (V
NO
or V
NC
) / V
COM
]. See Figure 5.
5. Between any two switches. See Figure 6.
06-0068
4
PS8834
05/22/06
COMPANY CONFIDENTIAL
PI3A412
0.4Ω, 3.3V, Quad SPDT Analog Switch
Electrical Specifications - Single +3.3V Supply
Description
Logic Input
Input High Voltage
Input Low Voltage
Input Current with Voltage High
Input Current with Voltage Low
Dynamic
Turn-On Time
Turn-Off Time
Break-Before-Make
Charge Injection
(3)
Off Isolation
(4)
Cross Talk
(5)
3dB Bandwidth
Off Capacitance
Off Capacitance
On Capacitance
t
ON
t
OFF
t
BBM
Q
O
IRR
X
TALK
f
3db
C
NC(OFF)
C
NO(OFF)
C
ON
V
CC
= 3.3V, V
COM
= 2.0V, Figure 1 & 2
V
IN
= 1.5V,
R
L
= 50Ω,
C
L
= 35pF, See Figure 3
C
L
= 1nF, V
GEN
= 0V,
R
GEN
= 0Ω, Figure 4
R
L
= 50Ω, f = 100kHz, Figure 5
R
L
= 50Ω, f = 100kHz, Figure 6
See Test Circiut Figure 9
f = 1 MHz, Figure 7
f = 1 MHz, Figure 8
1
20
12
12
100
-65
-65
40
50
50
135
pF
25
15
15
pC
dB
MHz
ns
V
IH
V
IL
I
AH
I
AL
Guaranteed logic High Level
Guaranteed logic Low Level
V
A
= 1.4V, all others = 0.5V
V
A
= 0.5V, all other = 1.4V
–1
–1
1.3
0.5
1
1
V
µA
Param-
eters
(V
CC
= +3.3V ± 10%, GND = 0V, V
IH
= 1.3V, V
IL
= 0.5V) (T
A
= –40°C to +85°C)
Test Conditions
Min.
(1)
Typ.
(2)
Max.
(1)
Units
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are V
CC
= 4.2V unless otherwise specified.
3. Guaranteed by design.
4. Off Isolation = 20log
10
[ (V
NO
or V
NC
) / V
COM
]. See Figure 5.
5. Between any two switches. See Figure 6.
06-0068
5
PS8834
05/22/06