Electronics
Semiconductor Division
RM3183
Dual ARINC 429 Line Receiver
Features
•
•
•
•
•
•
•
•
Converts ARINC levels to serial data
Adjustable noise filters
TTL and CMOS compatible outputs
Built-in test inputs
Input protection circuitry
Mil-Std-883B screening available
20-pin DIP and LCC packages available
Dice with Mil visual screening available
clamping diodes. Self-test logic inputs are provided for
internal system tests. These inputs force the outputs to
either a high, a low, or a null state for off-line system tests.
Input noise filtering is accomplished with external capaci-
tors. Two are required for each channel and can be adjusted
for best noise immunity at a specific data rate.
Three power supplies are needed plus ground. The input
thresholds depend only on the logic supply, so a wide range
of dual supplies can be accommodated.
The Raytheon RM3183 line receiver is the companion chip
to the RM3182 line driver. Together they provide all the
analog functions needed for the ARINC 429 interface.
Digital data processing involving serial-to-parallel conver-
sion and clock recovery can be accomplished using one of
the ARINC interface ICs available or by discrete or gate
array implementations.
Description
The RM3183 is a dual line receiver designed to meet all
requirements of the ARINC 429 interface specification.
It contains two independent receiver channels which accept
differential input signals and converts them to serial TTL
data.
Input overvoltage protection is provided by special circuitry
including dielectrically-isolated thin-film resistors and
Block Diagram
+V
S
+V
L
9
15
11
18
16
19
17
2
20
Input
Protection
& Level
Shift
In 1A
In 1B
Cap 1A
Cap 1B
Test A
Test B
C1A
Out 1A
C1B
12
Out 1B
Test
Interface
In 2A
In 2B
Cap 2A
Cap 2B
6
4
7
3
1
-V
S
C2A
Input
Protection
& Level
Shift
C2B
8
Out 2A
5
Out 2B
14
Gnd
65-3183-01
Rev. 1.0.0
RM3183
PRODUCT SPECIFICATION
Functional Description
The RM3183 contains two discrete ARINC 429 receiver
channels. Each channel contains three main sections: a
resistor-diode input network, a window comparator, and a
logic output buffer stage. The first stage provides overvolt-
age protection and biases the signal using voltage dividers
and current sources which are internally connected to the
+V
L
logic supply. This configuration provides excellent
input common mode rejection and a stable reference voltage
for the window comparators. Because the threshold for
switching is determined by this circuitry,
±
5% tolerance is
recommended for the +V
L
supply. The test inputs will set the
outputs to a predetermined state for built-in test capability.
The ARINC inputs must be forced to 0V when using the test
inputs. If the test inputs are not used, they should be
grounded.
The window comparator stage generates two serial data
streams, one having logic 1 states corresponding to ARINC
“High” states (OUTA), and the other having logic 1 states
corresponding to ARINC “Low” states (OUTB). An ARINC
“Null” state at the inputs forces both outputs to logic 0.
Thus, the ARINC clock signal is recovered by applying a
NOR function to OUTA and OUTB.
The output stage generates a TTL compatible logic output
capable of driving several gate inputs.
Pin Assignments
Ceramic Dip
Top View
3 Cap2B
LCC
Top View
19 Cap1A
2 TestA
20 TestB
TestA
Cap2B
In2B
Out2B
In2A
Cap2A
Out2A
+V
L
NC
2
3
4
5
6
7
8
9
10
19
18
17
16
15
14
13
12
11
65-3183-02
Cap1A
In1A
In2B 4
Cap1B
In1B
Out1A
GND
Out2B 5
In2A 6
Cap2A 7
Out2A 8
1 -V
S
-V
S
20
TestB
18
17
16
15
14
In1A
Cap1B
In1B
Out1A
GND
9
NC 10
+V
S
11
+V
L
NC
Out1B
+V
S
Out1B 12
NC 13
65-3183-03
Absolute Maximum Ratings
Parameter
Supply Voltage
+V
S
–V
S
+V
L
Operating Temperature Range
Storage Temperature Range
Input Voltage Range
Output Short Circuit Duration
Internal Power Dissipation
Lead Soldering Temperature (60 seconds)
-55
-65
Min.
Max.
+20
–20
+7
+125
+150
±
50
Not protected
900
+300
mW
°
C
Units
VDC
VDC
VDC
°
C
°
C
V
2
PRODUCT SPECIFICATION
RM3183
Thermal Characteristics
Maximum Junction Temperature
Maximum P
D
T
A
< 50
°
C
Thermal Resistance,
θ
J
C
Thermal Resistance,
θ
J
C
(Still air, soldered into PC board)
Ceramic DIP
+175
°
C
1042 mW
60
°
C/W
120
°
C/W
LCC
+175
°
C
925 mW
37
°
C/W
105
°
C/W
DC Electrical Characteristics
T
A
= -55
°
C to +125
°
C,
±
12V
≤
V
S
±
15V, V
L
= +5V, unless otherwise noted
Symbol
V
IH
V
IL
V
IN
V
IC
(2)
R
I
R
H
R
G
C
I
(1, 2)
C
H
(1, 2)
C
G
(1, 2)
V
IH
V
IL
I
IH
I
IL
Outputs
V
OH
V
OL
Tr
Tf
T
PLH
T
PHL
I
OH
= 100
µ
A
I
OH
= 2.8 mA
I
OL
= 100
µ
A
I
OL
= 2.0 mA
Rise Time
Fall Time
Propagation delay
Output low to high
Output high to low
T
A
= 25
°
C
Full temperature range
T
A
= 25
°
C
Full temperature range
C
L
= 50 pF, T
A
= 25
°
C
C
L
= 50 pF, T
A
= 25
°
C
C
L
= 50 pF, f
O
= 400 kHz
Filter caps = 39 pF
T
A
= 25
°
C
4.0
3.5
4.3
4.0
0.02
0.3
40
30
800
320
0.08
0.8
70
70
V
V
V
V
ns
ns
ns
ns
V(A)-V(B)
V(A)-V(B)
V(A)-V(B)
V(A) and V(B)-GND
Input resistance, Input A to Input B
Input resistance, Input A to Gnd
Input resistance, B to Gnd
Input capacitance, A to B
Input capacitance, A to Gnd
Input capacitance, B to Gnd
Logic 1 input voltage
Logic 0 input voltage
Logic 1 input current
Logic 0 input current
V
IH
= 2.7V
V
IL
= 0.0V
V(A) = 0V
V(B) = 0V
Filter caps disconnected
Filter caps disconnected
Filter caps disconnected
2.7
0.0
5
0.5
15
1.0
Parameter
Conditlons
OUTA = 1
OUTB = 1
OUTA and OUTB = 0
Maximum common mode
frequency = 80 kHz
30
19
19
Min.
6.5
-6.5
-2.5
Typ.
10
-10
0
±
5
50
25
25
3
3
3
10
10
10
Max.
13
-13
+2.5
Units
V
V
V
V
k
Ω
k
Ω
k
Ω
pF
pF
pF
V
V
µ
A
µ
A
Test Inputs (TESTA, TESTB)
3
RM3183
PRODUCT SPECIFICATION
DC Electrical Characteristics
(continued)
T
A
= -55°C to +125°C,
±12V ≤
V
S
±15V,
V
L
= +5V, unless otherwise noted
Symbol
Supply Current
I
CC
(+V
S
)
I
EE
(-V
S
)
I
DD
(+V
L
)
Test inputs = 0V
Test inputs = 0V
Test inputs = 0V
±
V
S
= 15V, T
A
= 15
°
C
±V
S
= 12V, T
A
= 15°C
±V
S
= 15V, T
A
= 15°C
±V
S
= 12V, T
A
= 15°C
±V
S
= 15V, T
A
= 15°C
±V
S
= 12V, T
A
= 15°C
3.7
3.0
8.7
7.4
9.0
8.6
7.0
6.0
15.0
14.0
20.0
18.0
mA
mA
mA
mA
mA
mA
Parameter
Conditlons
Min.
Typ.
Max.
Units
Notes:
1. With noise filter capacitors disconnected.
2. Guaranteed by design.
Truth Table
ARINC Inputs
V(A) - V(B)
Null
Low
High
V(A) = 0V, V(B) = 0V
V(A) = 0V, V(B) = 0V
V(A) = 0V, V(B) = 0V
Test Inputs
TESTA
0
0
0
0
1
1
TESTB
0
0
0
1
0
1
OUTA
0
0
1
0
1
0
Outputs
OUTB
0
1
0
1
0
0
4
PRODUCT SPECIFICATION
RM3183
Typical Performance Characteristics
1000
900
Supply Current (mA)
800
Prop Delay (ns)
700
600
500
400
300
65-3183-04
12
11
10
9
8
7
6
+V
S
(I
CC
)
65-3183-05
V
L
(I
DD
)
-V
S
(I
EE
)
V
S
= 15V
V
L
= +5V
T
PLH
T
PHL
200
100
0
-60
-35
-10
15
40
65
90
115
5
4
3
-60
-35
-10
15
40
140
65
90
115
140
Temperature (°C)
Temperature (°C)
Figure 1. Propagation Delay vs. Temperature
C
L
= 50 pF, C
FILTER
= 39 pF
Figure 2. Supply Current vs. Temperature
1.00
4.5
+125°C
0.75
V
OL
(Volts)
4.3
+125°C
V
OH
(Volts)
4.1
3.9
3.7
3.5
0
0.5
1.0
1.5
I
OH
(mA)
2.0
2.5
-55°C
65-3183-07
+25°C
0.50
+25°C
+55°C
0
0
0.5
1.0
1.5
I
OL
(mA)
2.0
2.5
3.0
65-3183-06
0.25
3.0
Figure 3. Output Voltage Low vs. Output Current
Figure 4. Output Voltage High vs. Output Current
70
60
Rise/Fall Time (ns)
50
40
3.0
T
R
Prop Delay (µs)
2.5
2.0
T
A
= +25 C
T
PLH
T
PHL
1.5
1.0
0.5
0
0
50
100
150
200
250
300
350
Filter Capacitance (pF)
65-3183-09
T
F
30
20
10
0
-60
-35
-10
15
40
65
90
115
65-3183-08
140
400
Temperature (°C)
Figure 5. T
R
and T
F
vs. Temperature
Figure 6. Propagation Delay vs. Filter Capacitance
T
A
= 25°C
5
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