APW6021
Advanced PWM and Triple Linear Power Controllers
Functional
•
4 Regulated Voltages are provided
•
Microprocessor Core (1.3V to 3.5V)
•
AGP Bus (1.5V or 3.3V)
•
Memory (1.8V)
•
GTL Bus (1.5V)
Applications
•
Motherboard Power Regulation for Computers
General Description
The APW6021 provides the power control and pro-
tection for four output voltages in high-performance,
graphics intensive microprocessor and computer
applications. The IC integrates voltage-mode PWM
controller and three linear controllers, as well as the
monitoring and protection functions into a 28-pin SOIC
package. The PWM controller regulates the micro-
processor core voltage with a synchronous-rectified
buck converter. The linear controllers regulate the
computer system’s AGP 1.5V or 3.3V bus power, the
1.5V GTL bus power, and the 1.8V power for the
North/South Bridge core voltage and/or cache
memory circuits. The APW6021 includes an Intel-
compatible, TTL 5-input digital-to-analog converter
(DAC) that adjusts the core PWM output voltage from
1.3 V
DC
to 2.05 V
DC
in 0.05V steps and from 2.1 V
DC
to
3.5 V
DC
in 0.1V increments. The precision reference
and voltage-mode control provide
±1%
static
regulation. The AGP bus power linear controller’s
output (V
OUT2
) is user-selectable, through a TTL-com-
patible signal applied at the SELECT pin, for levels of
1.5V or 3.3V with
±3%
accuracy. Based on the sta-
tus of the FIX pin, the other two linear regulators pro-
vide either fixed output voltages of 1.5V± 3% (V
OUT3
)
and 1.8V±3% (V
OUT4
), or user-adjustable by means
of an external resistor divider. All linear controllers
can employ either N-channel MOSFETs or bipolar
NPNs for the pass transistor.
The APW6021 monitors all the output voltages. A
single Power Good signal is issued when the core is
within
±10%
of the DAC setting and all other outputs
are above their under-voltage levels. Additional built-
in over-voltage protection for the core output uses
the lower MOSFET to prevent output voltages above
115% of the DAC setting. The PWM controller’s over-
current function monitors the output current by using
the voltage drop across the upper MOSFET’s r
DS(ON)
.
•
•
•
•
Linear Controllers Drives with both MOSFET
and Bipolar Series Pass Transistors
Fixed or Externally Resistor-Adjustable Linear
Outputs (FIX Pin)
Simple Single-Loop Control Design
•
Voltage-Mode PWM Control
Fast PWM Converter Transient Response
•
High-Bandwidth Error Amplifier
•
Full 0% to 100% Duty Ratio
•
Excellent Output Voltage Regulation
•
Core PWM Output:
±
1% Over Temperature
•
Other Outputs:
±
3% Over Temperature
•
TTL-Compatible 5- Bit DAC Microprocessor
Core Output Voltage Selection
•
Wide Range - 1.3V
DC
to 3.5 V
DC
•
•
Power-Good Output Voltage Monitor
Over-Voltage and Over-Current Fault Monitors
•
Switching Regulator Does Not Require
Extra Current Sensing Element, Uses
MOSFET’s r
DS(ON)
•
Small Converter Size
•
Constant Frequency Operation
•
200kHz Free-Running Oscillator; Program-
mable From 50kHz to Over 1MHz
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright
ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
1
www.anpec.com.tw
APW6021
Electrical Characteristics
(Recommended operating conditions, Unless otherwise noted) Refer to Block and Simplified Power
System Diagrams, and Typical Application Schematic
APW6021
Symbol
V
CC
Supply Current
I
CC
Nominal Supply Current
UGATE, LGATE, DRIVE2,
DRIVE3, and DRIVE4 open
Vocset=4.5V
Vocset=4.5V
Vocset=4.5V
Vocset=4.5V
8.2
2.5
0.5
1.26
RT= Open
RT= Open
185
200
1.9
215
9
mA
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Power-on Reset
Rising VCC Threshold
Falling VCC Threshold
Rising VAUX Threshold
VAUX Threshold Hysteresis
Rising V
OCSET
Threshold
Oscillator
F
OCS
∆
V
OSC
Free Running Frequency
Ramp Amplitude
kHz
V
P-P
10.4
V
V
V
V
V
DAC and Bandgap Reference
DAC(VID0-VID4) Input Low
Voltage
DAC(VID0-VID4) Input High
Voltage
DACOUT Voltage accuracy
V
BG
Bandgap Reference Voltage
Bandgap Reference Tolerance
Linear Regulators (OUT2, OUT3, and OUT4)
Regulation (All Linears)
VREG
2
VSEN2 Regulation Voltage
VREG
2
VSEN2 Regulation Voltage
VREG
3
VSEN3 Regulation Voltage
VREG
4
VSEN4 Regulation Voltage
Under-Voltage Level (VSEN/
VSEN Rising
VREN
UV
VREG)
Under-Voltage Hysteresis (VSEN/
VSEN Falling
VREG)
Output Drive Current (All Liners) VAUX-V
DRIVE
>0.6V
Select < 0.8V
Select > 2.0V
0.8
2.0
-1.0
1.265
-2.5
3
1.5
3.3
1.5
1.8
75
7
20
40
+2.5
0.8
+1.0
V
V
%
V
%
%
V
V
V
V
%
%
mA
Copyright
ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
4
www.anpec.com.tw
APW6021
Electrical Characteristics Cont.
APW6021
Symbol
Parameter
Test Conditions
Min.
Typ.
88
15
COMP=10pF
V
CC
=12V, V
UGATE
=6V
V
UGATE1-PHASE
=1V
V
CC
=12V, V
LGATE
=1V
V
LGATE
= 1V
1
3
6
1
3.5
Max.
Synchronous PWM Controller Error Amplifier
DC Gain
GBWP Gain-Bandwidth Product
SR
Slew Rate
PWM Controller Gate Driver
I
UGATE
UGATE Source
R
UGATE
I
LGATE
R
LGATE
UGATE Sink
LGATE Source
LGATE Sink
dB
MHz
V/µs
A
Ω
A
Ω
Unit
Protection
VSEN1 Over-Voltage
(VSEN1/DACOUT)
I
OVP
FAULT Souring Current
I
OCSET
I
SS
OCSET1 Current Source
Soft Start Current
VSEN1 Rising
V
FAULT/RT
=2.0V
V
OCSET
= 4.5V
DC
170
115
8.5
200
28
120
%
mA
µA
µA
230
Power Good
VSEN1 Upper Threshold
(VSEN1/DACOUT)
VSEN1 Under Voltage
(VSEN1/DACOUT)
VSEN1 Hysteresis (VSEN1
/DACOUT)
V
PGOOD
PGOOD Voltage Low
VSEN1 Rising
VSEN1 Rising
Upper /Lower Threshold
I
PGOOD
= -4mA
108
92
2
110
94
%
%
%
0.8
V
Functional Pin Description
DRIVE2 (Pin 1)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the AGP regulator’s
pass transistor.
FIX (Pin 2)
Grounding this pin bypasses the internal resistor di-
viders that set the output voltage of the 1.5V and 1.
8V linear regulators. This way, the output voltage of
the two regulators can be adjusted from 1.26V up to
the input voltage (+3.3V or +5V) by way of an exter-
nal resistor divider connected at the corresponding
VSEN pin. The new output voltage set by the exter-
nal resistor divider can be determined using the fol-
lowing formula:
V
OUT
=1.265V
× [
1+R
OUT
/ R
GND
]
where R
OUT
is the resistor connected from VSEN to
the output of the regulator, and R
GND
is the resistor
connected from VSEN to ground. Left open, the FIX
pin is pulled high, enabling fixed output voltage
operation.
Copyright
ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
5
www.anpec.com.tw
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