APW7025
Advanced PWM and Dual Linear Power Control
Features
•
3 Regulated Voltage are provided
•
Switching Power for VTT(1.25V)
•
Linear1 Regulator for FBVDDQ(2.5V)
•
Linear2 Regulator for NVVDD(2.05V)
General Description
The APW7025 integrates a PWM controller and Dual
linear controller, as well as the monitoring and pro-
tection functions into a single package , which pro-
vides three controlled power outputs with over-volt-
age and over-current protections. The PWM control-
ler regulates the DDR reference voltage with a syn-
chronous-rectified buck converter. The linear control-
ler regulates power for microprocessor core voltage
and Memory Voltage.
The precision reference and voltage-mode PWM
control provide
±2%
static regulation. The linear
controller drives an external N-channel MOSFET to
provide adjustable voltage.
The APW7025 monitors all the output voltages , and
a single Power Good signal is issued when the PWM
Voltage is within 10% of the 1.25V setting and the
other output levels are above their under-voltage
thresholds. Additional built-in over-voltage protec-
tion for the PWM output uses the lower MOSFET to
prevent output voltages above 115% of the 1.25V
setting. The PWM over-current function monitors
the output current by using the voltage drop across
the upper MOSFET’s R
DS(ON)
, eliminating the need
for a current sensing resistor.
•
•
Simple Single-Loop Control Design
•
Voltage-Mode PWM Control
Excellent Output Voltage Regulation
•
PWM Output:
±1%
•
Linear Output:
±3%
•
Fast Transient Response
•
High-Bandwidth Error Amplifier
•
Full 0% to 100% Duty Ratio
•
Power-Good Output Voltage Monitor
•
Over-Voltage and Over-Current Fault Monitors
•
Small Converter Size
•
Constant Frequency Operation(200kHz)
•
Programmable Oscillator from 50kHz to 1MHz
•
Reduce External Component Count
Pin Description
Applications
VCC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
UGATE
PHASE
LGATE
PGND
OCSET
VSEN1
FB
COMP
VSEN3
DRIVE3
GND
VAUX
•
•
•
DRIVE2
Motherboard Power Regulation for Computers
Low-Voltage Distributed Power Supplies
VGA Card Power Regulation
NC
NC
NC
NC
NC
PGOOD
VSEN2
SS
FAULT
NC
SOP24
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright
ANPEC Electronics Corp.
Rev.P.1 - Mar., 2001
1
www.anpec.com.tw
APW7025
Ordering Information
APW7025
Handling Code
Temp. Range
Package Code
Package Code
K : SOP - 24
Temp. Range
C : 0 to 70
°
C
Handling Code
TU : Tube
TR : Tape & Reel
Block Diagram
VSEN3
VAUX
Power-on
Reset
(POR)
VSEN1
OCSET
VCC
×
1.10
DRIVE3
-
+
×
0.90
LUV
VAUX
VSEN2
DRIVE2
-
+
-
+
Absolute Maximum Ratings
Symbol
V
CC
V
I
, V
O
T
A
T
J
T
STG
T
S
Supply Voltage
Input , Output or I/O Voltage
Operating Ambient Temperature Range
Junction Temperature Range
Storage Temperature Range
Soldering Temperature
2
Copyright
ANPEC Electronics Corp.
Rev. P.1 - Mar., 2001
+
-
×
0.75
+
-
+
-
200µA
PGOOD
+
-
1.26V
LINEAR
UNDER-
VOLTAGE
×
1.15
+
-
INHIBIT
FAULT
SOFT
START &
FAULT
LOGIC
OV
OC1
VCC
DRIVER1
UGATE
+
-
INHIBIT
PHASE
+
ERROR
AMP1
-
+
-
PWM
COMP1
PWM1
GATE
CONTROL
V
CC
SYNCH
DRIVE
+
1.5V
-
OSCILLATOR
V
CC
LGATE
PGND
GND
+
1.25V
28µA
-
4.5V
FAULT
SS
FB
COMP
Parameter
Rating
15
GND -0.3 V to V
CC
+0.3
0 to 70
0 to 125
-65 to +150
300 ,10 seconds
Unit
V
V
°C
°C
°C
°C
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APW7025
Thermal Characteristics
Symbol
R
θJA
Parameter
Thermal Resistance in Free Air
SOIC
SOIC (with 3in
2
of Copper)
Value
75
65
Unit
°C/W
Electrical Characteristics
(Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System
Diagrams , and Typical Application Schematic
Symbol
V
CC
Supply Current
I
CC
Nominal Supply Current
UGATE, LGATE, DRIVE2,
DRIVE3 open
9
mA
Parameter
Test Conditions
APW7025
Min.
Typ. Max.
Unit
Power-on Reset
Rising VCC Threshold
Vocset=4.5V
Falling VCC Threshold
Vocset=4.5V
Rising VAUX Threshold
Vocset=4.5V
VAUX Threshold Hysteresis
Vocset=4.5V
Rising V
OCSET
Threshold
Oscillator
F
OCS
Free Running Frequency
RT= Open
RT= Open
∆V
OSC
Ramp Amplitude
DAC and Bandgap Reference
DAC Voltage accuracy
V
BG
Bandgap Reference Voltage
Bandgap Reference Tolerance
Linear Regulators (OUT2, OUT3)
Regulation (All Linears)
Output Drive Current (All Liners) VAUX-V
DRIVE
>0.6V
Synchronous PWM Controller Error Amplifier
DC Gain
GBWP Gain-Bandwidth Product
SR
Slew Rate
COMP=10pF
PWM Controller Gate Driver
I
UGATE
UGATE Source
V
CC
=12V, V
UGATE
=6V
R
UGATE
UGATE Sink
V
UGATE1-PHASE
=1V
I
LGATE
LGATE Source
V
CC
=12V, V
LGATE
=1V
R
LGATE
LGATE Sink
V
LGATE
= 1V
10.4
8.2
2.5
0.5
1.26
185
200
1.9
215
V
V
V
V
V
kHz
V
P-P
%
V
%
%
mA
dB
MHz
V/µs
A
-1.0
1.265
-2.5
3
40
88
15
6
1
+1.0
+2.5
20
3.5
1
3
Ω
A
Ω
Copyright
ANPEC Electronics Corp.
Rev. P.1 - Mar., 2001
3
www.anpec.com.tw
APW7025
Electrical Characteristics Cont.
Symbol
Parameter
Test Conditions
APW7025
Min.
Typ. Max.
Unit
Protection
VSEN1 Over-Voltage
(VSEN1/DACOUT)
I
OVP
FAULT Souring Current
I
OCSET
OCSET Current Source
I
SS
Soft Start Current
Power Good
VSEN1 Upper Threshold
(VSEN1/DACOUT)
VSEN1 Under Voltage
(VSEN1/DACOUT)
VSEN1 Hysteresis (VSEN1
/DACOUT)
V
PGOOD
PGOOD Voltage Low
VSEN1 Rising
V
FAULT/RT
=2.0V
V
OCSET
= 4.5V
DC
115
8.5
200
28
120
%
mA
µA
µA
%
%
%
170
230
VSEN1 Rising
VSEN1 Rising
Upper /Lower Threshold
I
PGOOD
= -4mA
108
92
2
110
94
0.8
V
Functional Pin Description
VCC (Pin 1)
Provide a 12V bias supply for the IC to this pin. This
pin also provides the gate bias charge for all the
MOSFETs controlled by the IC. The voltage at this
pin is monitored for Power-On Reset (POR) purposes.
DRIVE2 (Pin 2)
FAULT (Pin 11)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the NVVDD regulator’s
pass transistor.
PGOOD (Pin 8)
PGOOD is an open collector output used to indicate
the status of the output voltages. This pin is pulled
low when the synchronous regulator output is not
within
±
10% of the DACOUT reference voltage or
when any of the other outputs are below their under-
voltage thresholds.
VSEN2 (Pin 9)
Connect this pin to a resistor divider to set the linear
This pin provides oscillator switching frequency
adjustment. By placing a resistor (R
T
) from this pin to
GND, the nominal 200kHz switching frequency is in-
creased according to the following equation:
Fs =200kHz + 5
×
10
6
/ R
T
(kΩ) (R
T
to GND)
Conversely, connecting a resistor from this pin to VCC
reduces the switching frequency according to the fol-
lowing equation:
regulator (NVVDD) output voltage.
SS (Pin 10)
Connect a capacitor from this pin to ground. This
capacitor, along with an internal 28µA current source,
sets the soft-start interval of the converter.
Fs =200kHz + 4
×
10
7
/ R
T
(kΩ) (R
T
to 12V)
Nominally, the voltage at this pin is 1.26V. In the event
of an over-voltage or over-current condition, this pin
Copyright
ANPEC Electronics Corp.
Rev. P.1 - Mar., 2001
4
www.anpec.com.tw
APW7025
Functional Pin Description Cont.
is internally pulled to VCC.
VAUX (Pin 13)
This pin provides boost current for the linear
regulator’s output drives in the event bipolar NPN tran-
sistors (instead of N-channel MOSFETs) are em-
ployed as pass elements. The voltage at this pin is
monitored for power-on reset purposes.
GND (Pin 14)
Signal ground for the IC. All voltage levels are mea-
sured with respect to this pin.
DRIVE3 (Pin 15)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the FBVDDQ
regulator’s pass transistor.
VSEN3 (Pin 16)
Connect this pin to a resistor divider to set the linear
regulator (FBVDDQ) output voltage.
COMP and FB (Pin 17, and 18)
COMP and FB are the available external pins of the
PWM converter error amplifier. The FB pin is the in-
verting input of the error amplifier. Similarly, the COMP
pin is the error amplifier output. These pins are used
to compensate the voltage-mode control feedback
loop of the synchronous PWM converter.
VSEN1 (Pin 19)
This pin is connected to the PWM converter’s output
voltage. The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for
over- voltage
protection.
OCSET (Pin 20)
Connect a resistor from this pin to the drain of the
respective upper MOSFET. This resistor, an internal
200µA current source, and the upper MOSFET’s on-
resistance set the converter over-
Copyright
ANPEC Electronics Corp.
Rev. P.1 - Mar., 2001
5
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current trip point. An over-current trip cycles the soft-
start function.
The voltage at this pin is monitored for power-on re-
set (POR) purposes and pulling this pin low with an
open drain device will shutdown the IC.
PGND (Pin 21)
This is the power ground connection. Tie the syn-
chronous PWM converter’s lower MOSFET source
to this pin.
LGATE (Pin 22)
Connect LGATE to the PWM converter’s lower
MOSFET gate. This pin provides the gate drive for
the lower MOSFET.
PHASE (Pin 23)
Connect the PHASE pin to the PWM converter’s up-
per MOSFET source. This pin represents the gate
drive return current path and is used to monitor the
voltage drop across the upper MOSFET for over-cur-
rent protection.
UGATE (Pin 24)
Connect UGATE pin to the PWM converter’s upper
MOSFET gate. This pin provides the gate drive for
the upper MOSFET.
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