HANBit
HMS1M32M8L
SRAM MODULE 4Mbyte(1Mx32Bit) ,LOW POWER,72Pin SIMM,5V
Part No.
HMS1M32M8L, HMS1M32Z8L
GENERAL DESCRIPTION
The HMS1M32M8L is a static random access memory (SRAM) module containing 1,048,576 bits organized in a x32-bit
configuration. The module consists of eight 512K x 8 SRAMs mounted on a 72-pin, double-sided, FR4-printed circuit board.
The HMS1M32M8L also support low data retention voltage for battery back-up operations with low data retention current. Eight
chip enable inputs, (/CE_UU1, /CE_UM1, /CE_LM1, /CE_LL1, /CE_UU2, /CE_UM2, /CE_LM2, /CE_LL2) are used to enable
the module’s 4M bytes independently. Output enable(/OE) and write enable(/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from
a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
Reading is
FEATURES
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Part identification
- HMS1M32M8L : SIMM design
- HMS1M32Z8L : ZIP design
The both are Pin to Pin Compatible
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Access times : 55ns, 70ns
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High-density 4MByte design
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High-reliability, low-power design
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Single + 5V
±0.5V
power supply
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Low data retention voltage : 2V(min)
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Three state output and TTL-compatible
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FR4-PCB design
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Low profile 72-Pin SIMM
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PIN ASSIGNMENT
SYMBOL
Vss
A3
A2
A1
A0
Vcc
A11
/OE
A10
Vcc
/CE_LL2
/CE_LL1
DQ7
DQ0
DQ1
DQ2
DQ6
DQ5
DQ4
DQ3
A15
A17
/WE
A13
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
Vcc
DQ8
DQ9
DQ10
/CE_LM2
Vcc
/CE_LM1
DQ15
DQ14
DQ13
DQ12
DQ11
A18
A16
Vss
A6
Vcc
A5
A4
Vcc
/CE_UM2
/CE_UM1
DQ23
DQ16
PIN
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
SYMBOL
DQ17
DQ18
DQ22
DQ21
DQ20
DQ19
Vcc
A14
A12
A7
Vcc
A8
A9
DQ24
DQ25
DQ26
/CE_UU2
/CE_UU1
DQ31
DQ30
DQ29
DQ28
DQ27
Vss
OPTIONS
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Timing
55ns access
70ns access
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Packages
72-pin SIMM
72-pin ZIP
MARKING
-55
-70
M
Z
SIMM
TOP VIEW
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
1
HANBit Electronics Co.,Ltd.
HANBit
FUNCTIONAL BLOCK DIAGRAM
DQ 0-DQ31
A0-A18
32
19
HMS1M32M8L
A0-18
/WE
/OE
/CE
/CE-UU1
A0-18
/WE
/OE
/CE
/CE-UM1
A0-18
/WE
/OE
/CE-LM1
/CE
DQ 8-15
/CE-UM2
DQ16-23
/CE-UU2
DQ24-31
A0-18
/WE
/OE
/CE
DQ24-31
U4
U8
A0-18
/WE
/OE
/CE
DQ16-23
U3
U7
A0-18
/WE
/OE
/CE
/CE-LM2
DQ 8-15
U2
U6
A0-18
/WE
/OE
/OE
DQ 0-7
/WE
/OE
A0-18
/WE
/OE
/CE
/CE-LL2
DQ 0-7
U1
/CE
U5
/CE-LL1
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
2
HANBit Electronics Co.,Ltd.
HANBit
TRUTH TABLE
MODE
STANDBY
NOT SELECTED
READ
WRITE or ERASE
NOTE: X means don’t care
/OE
X
H
L
X
/CE
H
L
L
L
/WE
X
H
H
L
DQ
HIGH-Z
HIGH-Z
Q
D
HMS1M32M8L
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
Operating Temperature
SYMBOL
V
IN,OUT
V
CC
P
D
T
STG
T
A
RATING
-0.5V to +7.0V
-0.5V to +7.0V
8W
-65oC to +150oC
0oC to +70oC
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Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
( TA=0 to 70 o C )
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
*
SYMBOL
V
CC
V
SS
V
IH
V
IL
MIN
4.5V
0
2.2
-0.5*
TYP.
5.0V
0
-
-
MAX
5.5V
0
Vcc+0.5V**
0.8V
V
IL
(Min.) = -2.0V (Pulse Width
≤
10ns) for I
≤
20 mA
**
V
IH
(Min.) = Vcc+2.0V (Pulse Width
≤
10ns) for I
≤
20 mA
DC AND OPERATING CHARACTERISTICS (1)
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V )
PARAMETER
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
* Vcc=5.0V, Temp=25 oC
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
3
HANBit Electronics Co.,Ltd.
TEST CONDITIONS
V
IN
= Vss to Vcc
/CE=V
IH or /
OE =V
IH
or /WE=V
IL
V
OUT
=Vss to V
CC
I
OH
= -4.0mA
I
OL
= 8.0mA
SYMBOL
IL
I
IL
0
V
OH
V
OL
MIN
-32
-32
2.4
MAX
32
32
UNITS
µA
µA
V
0.4
V
HANBit
DC AND OPERATING CHARACTERISTICS (2)
DESCRIPTION
Power Supply
Current:Operating
Power Supply
Current:Standby
TEST CONDITIONS
I
IO
=0mA,/CE=V
IL
, V
IN
=V
IL
or
V
IH
, Read
/CE=V
IH
, Other inputs=V
IL
or V
IH
/CE≥Vcc-0.2V, Other inputs=0~Vcc
SYMBOL
MAX
-55
480
96
400
HMS1M32M8L
-70
480
96
400
UNIT
l
CC
l
SB
l
SB1
mA
mA
µA
CAPACITANCE
DESCRIPTION
Input /Output Capacitance
Input Capacitance
TEST CONDITIONS
V
I/O
=0V
V
IN
=0V
SYMBOL
C
I/O
C
IN
MAX
248
320
UNIT
pF
pF
* NOTE : Capacitance is sampled and not 100% tested
AC CHARACTERISTICS
(0oC
≤
TA
≤
70 oC ; Vcc = 5V
±
0.5V, unless otherwise specified)
Test conditions
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
* See test condition of DC and Operating characteristics
Output Load (B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
VALUE
0.8 to 2.4V
5ns
1.5V
C
L
=100pF + 1TTL
Output Load (A)
V
L
=1.5V
+3.3V
50Ω
D
OUT
Z0=50Ω
30pF
D
OUT
353Ω
319Ω
5pF*
URL: www.hbe.co.kr
Rev. 1.0 (September / 2002)
4
HANBit Electronics Co.,Ltd.
HANBit
READ CYCLE
-55
PARAMETER
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Output
Output Enable to Low-Z Output
Chip Enable to Low-Z Output
Output Disable to High-Z Output
Chip Disable to High-Z Output
Output Hold from Address Change
SYMBOL
MIN
t
RC
t
AA
t
CO
t
OE
t
OLZ
t
LZ
t
OHZ
t
HZ
t
OH
5
10
0
0
10
20
20
55
55
55
25
5
10
0
0
10
MAX
MIN
70
-70
HMS1M32M8L
UNIT
MAX
ns
70
70
35
ns
ns
ns
ns
ns
25
25
ns
ns
ns
WRITE CYCLE
PARAMETER
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End of Write to Output Low-Z
SYMBOL
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
-55
MIN
55
45
0
45
40
0
0
25
0
5
20
MAX
MIN
70
60
0
60
50
0
0
30
0
5
25
-70
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING DIAGRAMS
Please refer to timing diagram chart(II)
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Rev. 1.0 (September / 2002)
5
HANBit Electronics Co.,Ltd.
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