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74LCXHR162245

Description
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
File Size167KB,10 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
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74LCXHR162245 Overview

LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

74LCXHR162245
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER
WITH 5V TOLERANT INPUTS AND OUTPUT (3-STATE)
s
s
s
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED:
t
PD
= 4.7 ns (MAX.) at V
CC
= 3V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 12mA (MIN) at V
CC
= 3V
PCI BUS LEVELS GUARANTEED AT 12 mA
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
BUS HOLD PROVIDED ON BOTH SIDES
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16245
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74LCXHR162245TTR
PIN CONNECTION
DESCRIPTION
The 74LCXHR162245 is a low voltage CMOS 16
BIT BUS TRANSCEIVER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
This IC is intended for two-way asynchronous
communication between data buses; the direction
of data transmission is determined by DIR input.
The two enable inputs nG can be used to disable
the device so that the buses are effectively isolat-
ed.
Bus hold on data inputs is provided in order to
eliminate the need for external pull-up or
pull-down resistor.
All outputs, which are designed to sink up to
12mA, include 26
resistors to reduce overshoot
and undershoot.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
July 2003
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