Features
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Antenna Driver Stage with Adjustable Antenna Peak Current for up to 1.5 A
Frequency Tuning Range from 100 kHz to 150 kHz
Automatic Antenna Peak Current Regulation
Self-tuning Oscillator for Antenna Resonant Frequency Adaption
Capable of Driving a High-Q Antenna
Integrated 5 V Regulator for External Load up to 10 mA
Bi-directional Single Wire Interface for Microcontroller or ECU
LF Baud Rates up to 4 kbaud and Amplitude Shift Keying (ASK) Modulation
Low Power Standby Mode < 50 µA
Antenna Driver Diagnosis: Peak Current, Antenna Frequency and Battery Voltage
Monitoring
Power Supply Range 8 V to 24 V Direct Battery Input
Load Dump Protection up to 45 V for 12 V Boards
Operation at Temperature -40°C to +105°C
EMI and ESD According to Automotive Requirements
Highly Integrated, Fewer External Components Required
Driver Overcurrent Protection
Overtemperature Protection
125 kHz
Transmitter IC
for TPM
ATA5275
Preliminary
Applications
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Tire Pressure Measurement (TPM)
Benefits
•
Self Tuning Capability to Antenna Resonance Frequency
•
Adjustable Antenna Peak Current Value
•
Highest Integration Level for Embedded Automotive Systems
Electrostatic sensitive device.
Observe precautions for handling.
Description
The ATA5275 is an integrated 1.5 A peak current BCDMOS antenna driver IC dedi-
cated as a 125 kHz wake-up channel transmitter for TPM applications.
It includes the full functionality to generate a magnetic LF field in conjunction with an
antenna coil to transmit data and power to a receiver. The transmission can be con-
trolled via a one wire I/O-interface by an external unit.
The smart power IC is delivered in a QFN20 power package with heat slug.
Rev. 4739C–AUTO–02/05
1. General Description
The ATA5275 is a 125-kHz transmitter IC. It is dedicated to driving 125 kHz LC antenna tanks,
specifically for the wake-up channel in Tire Pressure Measurement (TPM) applications.
It includes a control logic with VCO which generates the 125 kHz signal for the output driver
stage. A phase lock circuit regulates the driver output frequency on the antenna resonance fre-
quency, achieving a maximum field strength on the antenna. The driver duty cycle is regulated
and stabilizes the antenna current for a wide supply voltage range.
The IC can be controlled by a microcontroller or ECU via the one wire bi-directional interface. It
is used for the data transmission and to indicate errors. For the data transmission ASK modula-
tion is used. The antenna signal is modulated by the DIO interface line.
The IC has a build in diagnosis function and detects detuning and broken or short wire of the
antenna circuitry. If a failure is detected the IC indicates it by an error signal via the DIO line.
The integrated 5 V regulator can be used externally for a load up to 10 mA.
Figure 1-1.
Block Diagram
20
DVCC3
19
BOOST
18
VCC
17
DIO
16
VDIO
1
DVCC2
5V
REG
REF
BIAS
K-
Line
15
TM1
2
DVCC1
ATA5275
125-kHz Transmitter
State
Machine
14
TM2
Half Bridge
3
DRV3
13
TM3
Gate
Drive
Control
VCO
XOR
4
DRV2
12
RCR
5
DRV1
11
REXT
6
DVSS3
7
DVSS2
8
DVSS1
9
SENSE
10
VSS
2
ATA5275 [Preliminary]
4739C–AUTO–02/05
ATA5275 [Preliminary]
2. Pin Configuration
Figure 2-1.
Pinning QFN20
20
19
DVCC3 BOOST
18
VCC
17
DIO
16
VDIO
1
DVCC2
2
DVCC1
15
TM1
14
TM2
3
DRV3
ATA5275
13
TM3
4
DRV2
12
RCR
5
DRV1
11
REXT
6
DVSS3
7
DVSS2
8
DVSS1
9
SENSE
10
VSS
Table 2-1.
Pin
(1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Pin Description
Symbol
DVCC2
DVCC1
DRV3
DRV2
DRV1
DVSS3
DVSS2
DVSS1
SENSE
VSS
REXT
RCR
TM3
TM2
TM1
VDIO
DIO
VCC
BOOST
Function
Battery supply input
Battery supply input
Antenna driver stage output
Antenna driver stage output
Antenna driver stage output
Power supply ground
Power supply ground
Power supply ground
Current zero crossing sense input
Analog and digital ground
External reference current input
External reference for antenna peak current
For test purposes only
For test purposes only
For test purposes only
DIO line interface voltage selection
One-wire serial interface line
5 V supply output (for external storage capacitor only)
External bootstrap cap
20
DVCC3
Battery supply input
Note:
1. Pin numbers valid for all revisions of the ATA5275
3
4739C–AUTO–02/05
3. Functional Description
3.1
Operation Modes
There are two different operation modes for the ATA5275:
• Standby mode
• Transmission mode
3.2
Standby Mode and Wake-up
After power-on-reset, the ATA5275 is in standby mode. For minimum power consumption, only
the internal 5 V supply and the DIO line interface are active. The IC can be activated by the
external control unit via the serial interface. The DIO line is called logic high if it is pulled up to
the VDIO voltage level. The DIO line is called logic low if it is pulled down to the VSS voltage
level. A low signal at the DIO line wakes-up the IC.
The circuit enters the standby mode if either of these three conditions are fulfilled:
1. After power-on-reset and the DIO is high (see
Figure 3-1)
2. After a time out of T
OUTL(1)
during which DIO is permanently low (see
Figure 3-3 on
page 5)
3. After a time out of T
OUTH(2)
during which DIO is permanently high and an acknowledge
time T
ACK
/T
ERR(1)
(see
Figure 3-2)
Notes:
1. Time does not depend on the antenna resonance frequency.
2. Time depends on the antenna resonance frequency.
Figure 3-1.
STBY After POR
STBY
t
DIO
t
POR
t
Figure 3-2.
STBY After DIO = H
STBY
t
TOUT_H
TACK/TERR
DIO
t
4
ATA5275 [Preliminary]
4739C–AUTO–02/05
ATA5275 [Preliminary]
Figure 3-3.
STBY After DIO = L
TOUT_L
STBY
t
DIO
t
3.3
3.3.1
Transmission Mode
ASK Modulation
For the transmission of a wake-up signal or data to a receiver, the ATA5275 generates a
antenna resonance synchronized signal at the antenna driver output (DRV pin). A connected LC
antenna radiates a magnetic field. For the data transmission the field can be 100% amplitude
modulated by the DIO interface input. If a low level signal is applied at the DIO pin, the driver
generates a square wave signal DRV for the antenna. If a high level signal is applied at the DIO
pin the driver is stopped and switched to ground. In this way ASK modulated data can be trans-
mitted (see
Figure 3-4).
Figure 3-4.
DIO
Data Transmission
DRV
COIL
3.3.2
Anti-bouncing Filter in Transmission Mode
The DIO input signal is delayed for a anti-bouncing time.
The driver is switched on after a delay time of T
DL
(typically 64 µs) if the DIO is pulled to a low
level continuously. The driver is switched-off after a delay time of T
DH
if the DIO is pulled to high
level.
The T
DH
time depends on the antenna resonance frequency, suppressing short disturbance
pulses from the DIO Line.
Figure 3-5.
Anti-bouncing
TD_L
TD_H
5
4739C–AUTO–02/05