Input bias current is specified for two different conditions. The T
J
= 25∞C specification is with the junction at ambient temperature; the device operating specification
is with the device operating in a warmed-up condition at 25∞C ambient. The warmed-up bias current value is correlated to the junction temperature value via the
curves of I
B
versus T
J
and I
B
versus T
A
. ADI has a bias current compensation circuit which gives improved bias current over the standard JFET input op amps. I
B
and
I
OS
are measured at V
CM
= 0.
2
Settling time is defined here for a unity gain inverter connection using 2 k
W
resistors. It is the time required for the error voltage (the voltages at the inverting input pit
on the amplifier) to settle to within a specified percent of its final value from the time a 10 V step input is applied to the inverter. See settling time test circuit.
3
Sample tested.
4
Settling time is defined here for A
V
= –5 connection with R
F
= 2 kW. It is the time required for the error voltage (the voltage at the inverting input pin on the amplifier) to
settle to within 0.01% of its final value from the time a 2 V step input is applied to the inverter. See settling time test circuit.
–2–
REV. A
OP15/OP17
Electrical Characteristics
(@ V =
±15
V, –55 C
£
T
£
125 C, unless otherwise noted.)
S
A
Parameter
Input Offset Voltage
Average Input Offset Voltage Drift
1
Without External Trim
With External Trim
Input Offset Current
2
OP17
Input Bias Current
2
OP17
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
Symbol
V
OS
TCV
OS
TCV
OS
I
OS
I
B
IVR
CMRR
PSRR
A
VO
V
O
Conditions
R
S
= 50
W
Min
Typ
0.4
2
2
0.6
1.0
±
1.2
±
2.0
Max
0.9
5
4.0
8.5
±
5.0
±
11
Units
mV
mV/∞C
mV/∞C
nA
nA
nA
nA
V
R
P
= 100
W
T
J
= 125∞C
T
A
= 125∞C, device operating
T
J
= 125∞C
T
A
= 125∞C, device operating
±
10.4
V
CM
=
±
10.4 V
V
S
=
±
10 V to
±
18 V
R
L
≥
2 kW, V
O
=
±
10 V
R
L
≥
10 kW
35
±
12
85
97
15
120
±
13
57
dB
mV/V
V/mV
V
NOTES
1
Sample tested.
2
Input bias current is specified for two different conditions. The T
J
= 25∞C specification is with the junction at ambient temperature; the device operating specification
is with the device operating in a warmed-up condition at 25∞C ambient. The warmed-up bias current value is correlated to the junction temperature value via the
curves of I
B
versus T
J
and I
B
versus T
A
. ADI has a bias current compensation circuit which gives improved bias current over the standard JFET input op amps. I
B
and
I
OS
are measured at V
CM
= 0.
ELECTRICAL CHARACTERISTICS
Parameter
Input Offset Voltage
Symbol
V
OS
Conditions
R
S
= 50
W
(@ V
S
= 15 V, 0 C
£
T
A
£
70 C for E and F grades, –40 C
£
T
A
£
85 C for G grades
unless otherwise noted)
OP15E/OP17E
Min
Typ
Max
0.3
0.75
OP15F/OP17F
Min
Typ
Max
0.55
1.5
OP15G/OP17G
Min
Typ
Max
0.7
3.8
Unit
mV
Average Input Offset
Voltage Drift
1
Without External Trim TCV
OS
With External Trim TCV
OSn
Input Offset Current
2
I
OS
OP15
OP17
Input Bias Current
2
OP15
OP17
Input Voltage Range
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Large Signal
Voltage Gain
Output Voltage
Swing
IVR
CMRR
PSRR
A
VO
V
O
I
B
R
P
= 100
W
T
J
= 70∞C
T
A
= 70∞C, Device Operating
T
J
= 70∞C
T
A
= 70∞C, Device Operating
T
J
= 70∞C
T
A
= 70∞C, Device Operating
T
J
= 70∞C
T
A
= 70∞C, Device Operating
±
10.4
V
CM
=
±
10.4 V
V
CM
=
±
10.25 V
V
S
=
±
10 V to
±
18 V
V
S
=
±
10 V to
±
15 V
R
L
≥
2 kW
V
O
=
±
10 V
R
L
≥
10 kW
65
±
12
85
2
2
0.04
0.06
0.04
0.07
±
0.10
±
0.13
±
0.10
±
0.15
5
0.30
0.55
0.30
0.70
±
0.40
±
0.75
±
0.40
±
0.90
±
10.4
3
3
0.06
0.08
0.06
0.10
±
0.12
±
0.16
±
0.12
±
0.20
10
0.45
0.80
0.45
1.1
±
0.60
±
1.1
±
0.60
±
1.4
±
10.25
4
4
0.08
0.10
0.08
0.15
±
0.14
±
0.19
±
0.14
±
0.25
30
0.85
1.2
0.85
1.7
±
0.80
±
1.5
±
0.80
±
2.0
mV/∞C
mV/∞C
nA
nA
nA
nA
nA
nA
nA
nA
V
98
13
200
±
13
57
85
96
80
13
57
20
100
35
±
12
160
±
13
94
dB
dB
mV/V
mV/V
V/mV
V
50
±
12
180
±
13
NOTES
1
Sample tested.
2
Input bias current is specified for two different conditions. The T
J
= 25∞C specification is with the junction at ambient temperature; the device operating specification
is with the device operating in a warmed-up condition at 25∞C ambient. The warmed-up bias current value is correlated to the junction temperature value via the
curves of I
B
versus T
J
and I
B
versus T
A
. ADI has a bias current compensation circuit which gives improved bias current over the standard JFET input op amps. I
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