and differentiation capabil‐ • Up to 13.59 megabits (Mb) of embedded memory
ities
• Variable-precision digital signal processing (DSP) blocks
Increased bandwidth
capacity
Hard processor system
(HPS) with integrated
ARM
®
Cortex
™
-A9
MPCore processor
• 3.125 gigabits per second (Gbps) and 6.144 Gbps transceivers
• Hard memory controllers
• Tight integration of a dual-core ARM Cortex-A9 MPCore processor, hard
IP, and an FPGA in a single Cyclone V system-on-a-chip (SoC)
• Supports over 128 Gbps peak bandwidth with integrated data coherency
between the processor and the FPGA fabric
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101 Innovation Drive, San Jose, CA 95134
2
Summary of Cyclone V Features
CV-51001
2017.12.18
Advantage
Supporting Feature
Lowest system cost
• Requires only two core voltages to operate
• Available in low-cost wirebond packaging
• Includes innovative features such as Configuration via Protocol (CvP)
and partial reconfiguration
Summary of Cyclone V Features
Table 2: Summary of Features for Cyclone V Devices
Feature
Description
Technology
Packaging
• TSMC's 28-nm low-power (28LP) process technology
• 1.1 V core voltage
• Wirebond low-halogen packages
• Multiple device densities with compatible package footprints for seamless
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Embedded System
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