ST10F272M-4T3 datasheet, PDF - EEWORLD Datasheet

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ST10F272M-4T3: Description16-bit Microcontrollers - MCU 16-bit MCU 256 Kbyte Flash memory 20 Kbyt; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，176 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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ST10F272M-4T3 Overview

16-bit Microcontrollers - MCU 16-bit MCU 256 Kbyte Flash memory 20 Kbyt

ST10F272M-4T3 Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Is it Rohs certified?	conform to
Parts packaging code	QFP
package instruction	20 X 20 MM, 1.40 MM HEIGHT, ROHS COMPLIANT LQFP-144
Contacts	144
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Has ADC	YES
Address bus width	24
bit size	16
CPU series	ST10
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	NO
External data bus width	16
JESD-30 code	S-PQFP-G144
JESD-609 code	e3
length	20 mm
Humidity sensitivity level	3
Number of I/O lines	111
Number of terminals	144
On-chip program ROM width	32
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP144,.87SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	20480
rom(word)	65536
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	40 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	20 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC
Base Number Matches	1

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ST10F272M

16-bit MCU with 256 Kbyte Flash memory and 20 Kbyte RAM

Datasheet

−

production data

Features

■

16-bit CPU with DSP functions

– 50ns instruction cycle time at 40 MHz max

CPU clock

– Multiply/accumulate unit (MAC) 16 x 16-bit

multiplication, 40-bit accumulator

– Enhanced boolean bit manipulations

– Single-cycle context switching support

On-chip memories

– 256 Kbyte Flash memory (32-bit fetch)

– Single voltage Flash memories with

erase/program controller and 100 K

erasing/programming cycles.

– Up to 16 Mbyte linear address space for

code and data (5 Mbytes with CAN or I

– 2 Kbyte internal RAM (IRAM)

– 18 Kbyte extension RAM (XRAM)

– Programmable external bus configuration &

characteristics for different address ranges

– 5 programmable chip-select signals

– Hold-acknowledge bus arbitration support

Interrupt

– 8-channel peripheral event controller for

single cycle interrupt driven data transfer

– 16-priority-level interrupt system with 56

sources, sampling rate down to 25 ns

Timers

– 2 multi-functional general purpose timer

units with 5 timers

Two 16-channel capture/compare units

Serial channels

– 2 synch./asynch. serial channels

– 2 high-speed synchronous channels

– One I

C standard interface

■

24-channel A/D converter

– 16-channel 10-bit, accuracy ± 2 LSB

– 8-channel 10-bit, accuracy ± 5 LSB

– 4.85 µs minimum conversion time

4-channel PWM unit + 4-channel XPWM

2 CAN 2.0B interfaces operating on 1 or 2 CAN

busses (64 or 2x32 message, C-CAN version)

Fail-safe protection

– Programmable watchdog timer

– Oscillator watchdog

On-chip bootstrap loader

Clock generation

– On-chip PLL with 4 to 8 MHz oscillator

– Direct or prescaled clock input

Real-time clock and 32 kHz on-chip oscillator

Up to 111 general purpose I/O lines

– Individually programmable as input, output

or special function

– Programmable threshold (hysteresis)

Idle, power-down and stand-by modes

Single voltage supply: 5 V ± 10 % (embedded

regulator for 1.8 V core supply)

Temperature range: -40 to +125 °C

■

September 2013

This is information on a product in full production.

Doc ID 12968 Rev 4

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www.st.com

Contents

ST10F272M

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.1

1.2

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Special characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2.1

1.2.2

1.2.1 X-peripheral clock gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2.2 Improved supply ring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Pin data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Internal Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.1

5.2

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.2.1

5.2.2

5.2.3

Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Modules structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.3

5.4

Write operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.4.1

5.4.2

5.4.3

5.4.4

5.4.5

5.4.6

5.4.7

5.4.8

5.4.9

5.4.10

5.4.11

Flash control register 0 low (FCR0L) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Flash control register 0 high (FCR0H) . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Flash control register 1 low (FCR1L) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Flash control register 1 high (FCR1H) . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Flash data register 0 low (FDR0L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Flash data register 0 high (FDR0H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Flash data register 1 low (FDR1L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Flash data register 1 high (FDR1H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Flash address register low (FARL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Flash address register high (FARH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Flash error register (FER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.5

Protection strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.5.1

5.5.2

Protection registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Flash non-volatile write protection I register (FNVWPIR) . . . . . . . . . . . 36

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5.5.3

5.5.4

5.5.5

5.5.6

5.5.7

5.5.8

5.5.9

Contents

Flash non-volatile access protection register 0 (FNVAPR0) . . . . . . . . . 36

Flash non-volatile access protection register 1 low (FNVAPR1L) . . . . . 36

Flash non-volatile access protection register 1 high (FNVAPR1H) . . . . 37

X-bus Flash volatile temporary access unprotection register

(XFVTAUR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Access protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Write protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Temporary unprotection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

5.6

5.7

Write operation examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Write operation summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Bootstrap loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

6.1

6.2

6.3

Selection among user-code, standard or selective bootstrap . . . . . . . . . . 43

Standard bootstrap loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Alternate and selective boot mode (ABM and SBM) . . . . . . . . . . . . . . . . 44

6.3.1

6.3.2

6.3.3

Activation of the ABM and SBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

User mode signature integrity check . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Selective boot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Central processing unit (CPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

7.1

7.2

7.3

Multiplier-accumulator unit (MAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Instruction set summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

MAC co-processor specific instructions . . . . . . . . . . . . . . . . . . . . . . . . . . 49

External bus controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Interrupt system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

9.1

9.2

X-peripheral interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Exception and error traps list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Capture/compare (CAPCOM) units . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

General purpose timer unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

11.1

11.2

GPT1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

GPT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

PWM modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

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Contents

ST10F272M

Parallel ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

13.1

13.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

I/O’s special features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

13.2.1

13.2.2

Open drain mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Input threshold control

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

13.3

Alternate port functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Serial channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

15.1

15.2

15.3

15.4

Asynchronous/synchronous serial interfaces . . . . . . . . . . . . . . . . . . . . . . 68

ASCx in asynchronous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

ASCx in synchronous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

High speed synchronous serial interfaces . . . . . . . . . . . . . . . . . . . . . . . . 69

C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

CAN modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

17.1

17.2

Configuration support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

CAN bus configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

17.2.1

17.2.2

17.2.3

Single CAN bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Multiple CAN bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Parallel mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Real-time clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

System reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

20.1

20.2

20.3

20.4

20.5

20.6

20.7

Input filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Asynchronous reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Synchronous reset (warm reset) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Software reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Watchdog timer reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Bidirectional reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Reset circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

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Contents

20.8

20.9

Reset application examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Reset summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Power reduction modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

21.1

21.2

Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

21.2.1

21.2.2

Protected power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Interruptible power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

21.3

Stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

21.3.1

21.3.2

21.3.3

21.3.4

Entering stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Exiting stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Real-time clock and stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Power reduction modes summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Programmable output clock divider . . . . . . . . . . . . . . . . . . . . . . . . . . 107

23.1

23.2

23.3

23.4

Special function registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

X-registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Flash registers ordered by name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

Identification registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

24.1

24.2

24.3

24.4

24.5

24.6

24.7

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

Power considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

Parameter interpretation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

Flash characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

A/D converter characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

24.7.1

24.7.2

24.7.3

24.7.4

Conversion timing control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

A/D conversion accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Total unadjusted error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

Analog reference pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

24.8

AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

24.8.1

Test waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

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ST10F272M-4T3 Related Products

	ST10F272M-4T3	ST10F272M-4TR3
Description	16-bit Microcontrollers - MCU 16-bit MCU 256 Kbyte Flash memory 20 Kbyt	16-bit Microcontrollers - MCU 16-bit MCU 256 Kbyte Flash memory 20 Kbyt
Brand Name	STMicroelectronics	STMicroelectronics
Is it Rohs certified?	conform to	conform to
Parts packaging code	QFP	QFP
package instruction	20 X 20 MM, 1.40 MM HEIGHT, ROHS COMPLIANT LQFP-144	20 X 20 MM, 1.40 MM HEIGHT, ROHS COMPLIANT LQFP-144
Contacts	144	144
Reach Compliance Code	compliant	not_compliant
ECCN code	3A991.A.2	3A991.A.2
Has ADC	YES	YES
Address bus width	24	24
bit size	16	16
CPU series	ST10	ST10
maximum clock frequency	40 MHz	40 MHz
DAC channel	NO	NO
DMA channel	NO	NO
External data bus width	16	16
JESD-30 code	S-PQFP-G144	S-PQFP-G144
JESD-609 code	e3	e3
length	20 mm	20 mm
Humidity sensitivity level	3	3
Number of I/O lines	111	111
Number of terminals	144	144
On-chip program ROM width	32	32
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C
PWM channel	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFQFP	LFQFP
Encapsulate equivalent code	QFP144,.87SQ,20	QFP144,.87SQ,20
Package shape	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260	260
power supply	5 V	5 V
Certification status	Not Qualified	Not Qualified
RAM (bytes)	20480	20480
rom(word)	65536	65536
ROM programmability	FLASH	FLASH
Maximum seat height	1.6 mm	1.6 mm
speed	40 MHz	40 MHz
Maximum supply voltage	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	40	40
width	20 mm	20 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC

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