White Electronic Designs
512MB- 64Mx72 SDRAM UNBUFFERED
FEATURES
PC100 and PC133 Compatible
Burst Mode Operation
Auto and Self Refresh capability
LVTTL compatible inputs and outputs
Serial Presence Detect with EEPROM
Fully synchronous: All signals are registered on the
positive edge of the system clock
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
3.3V ± 0.3V Power Supply
144 Pin SO-DIMM
• Package height option:
AD1: 27.94 (1.10")
W3DG7268V-AD1
PRELIMINARY*
DESCRIPTION
The W3DG7268V is a 64Mx72 synchronous DRAM module
which consists of nine 64Mx8 SDRAM components in
TSOP II package, and one 2K EEPROM in an 8 pin TSSOP
package for Serial Presence Detect which are mounted on
a 144 Pin SO-DIMM multilayer FR4 Substrate.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
PIN FRONT PIN BACK PIN FRONT PIN BACK PIN FRONT PIN BACK
1
V
SS
2
V
SS
49 DQ13 50 DQ45 97 DQ22 98 DQ54
3
DQ0
4
DQ32 51 DQ14 52 DQ46 99 DQ23 100 DQ55
5
DQ1
6
DQ33 53 DQ15 54 DQ47 101 V
CC
102 V
CC
7
DQ2
8
DQ34 55
V
SS
56
V
SS
103
A6
104
A7
9
DQ3
10 DQ35 57
CB0
58
CB4 105
A8
106 BA0
11
V
CC
12
V
CC
59
CB1
60
CB5 107 V
SS
108 V
SS
13
DQ4
14 DQ36 61 CLK0 62 CKE0 109
A9
110 BA1
15
DQ5
16 DQ37 63
V
CC
64
V
CC
111 A10 112 A11
17
DQ6
18 DQ38 65 RAS# 66 CAS# 113 V
CC
114 V
CC
19
DQ7
20 DQ39 67 WE# 68
NC
115 DQMB2 116 DQMB6
21
V
SS
22
V
SS
69 CS0# 70
A12 117 DQMB3 118 DQMB7
23 DQMB0 24 DQB4 71
NC
72
NC
119
V
SS
120 V
SS
25 DQMB1 26 DQB5 73
NC
74 CLK1 121 DQ24 122 DQ56
27
V
CC
28
V
CC
75
V
SS
76
V
SS
123 DQ25 124 DQ57
29
A0
30
A3
77
CB2
78
CB6 125 DQ26 126 DQ58
31
A1
32
A4
79
CB3
80
CB7 127 DQ27 128 DQ59
33
A2
34
A5
81
V
CC
82
V
CC
129 V
CC
130 V
CC
35
V
SS
36
V
SS
83 DQ16 84 DQ48 131 DQ28 132 DQ60
37
DQ8
38 DQ40 85 DQ17 86 DQ49 133 DQ29 134 DQ61
39
DQ9
40 DQ41 87 DQ18 88 DQ50 135 DQ30 136 DQ62
41 DQ10 42 DQ42 89 DQ19 90 DQ51 137 DQ31 138 DQ63
43 DQ11 44 DQ43 91
VSS
92
V
SS
139 V
SS
140 V
SS
45
V
CC
46
V
CC
93 DQ20 94 DQ52 141 SDA 142 SCL
47 DQ12 48 DQ44 95 DQ21 96 DQ53 143 V
CC
144 V
CC
A0 – A12
BA0-1
DQ0-63
CB0-7
CLK0,CK1
CKE0
CS0#
RAS#
CAS#
WE#
DQMB0-7
V
CC
V
SS
SDA
SCL
DNU
NC
PIN NAMES
Address input (Multiplexed)
Select Bank
Data Input/Output
Check bit (Data-in/data-out)
Clock input
Clock Enable input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Serial data I/O
Serial clock
Do not use
No Connect
October 2004
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FUNCTIONAL BLOCK DIAGRAM
WE#
CS0#
DQMB0
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
CS0#
WE#
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQMB4
DQM
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
CS0#
WE#
W3DG7268V-AD1
PRELIMINARY
I/O 7
DQMB1
DQM
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
CS0#
WE#
DQMB5
DQM
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
CS0#
WE#
DQMB6
DQM
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQMB2
DQM
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQMB3
DQM
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
CS0#
WE#
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
CS0#
WE#
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
CS0#
WE#
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQM
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
CS0#
WE#
D7
DQMB7
DQM
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
CS0#
WE#
Note: DQ wiring may differ than
described in this drawing, however
DQ/DQMB/CKE/S relationships must
be maintained as shown.
I/O 7
*CLOCK WIRING
RAS#
CAS#
CKE0
BA0-BA1
A0-A12
RAS#: SDRAM D0-D8
CAS#: SDRAM D0-D8
CKE: SDRAM D0-D8
BA0-BA1: SDRAM D0-D8
A0-A12: SDRAM D0-D8
CLOCK
INPUT
*CLK0
*CLK1
SDRAMS
5 SDRAMS
4 SDRAMS
*Wire per Clock Loading Table/Wiring Diagrams
V
CC
D0-D8
SERIAL PD
SCL
A0
A1
A2
SDA
V
SS
D0-D8
October 2004
Rev. 2
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
CC
supply relative to V
SS
Storage Temperature
Power Dissipation
Short Circuit Current
Symbol
V
IN
, V
OUT
V
CC
, V
CCQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
W3DG7268V-AD1
PRELIMINARY
Units
V
V
°C
W
mA
-55 ~ +150
9
50
Note: Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Voltage Referenced to: V
SS
= 0V, 0°C
≤
T
A
≤
+70°C
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Leakage Current
Symbol
V
CC
V
IH
V
IL
V
OH
V
OL
I
LI
Min
3.0
2.0
-0.3
2.4
—
-10
Typ
3.3
3.0
—
—
—
—
Max
3.6
V
CCQ+0.3
0.8
—
0.4
10
Unit
V
V
V
V
V
µA
1
2
I
OH
= -2mA
I
OL
= +2mA
3
Note
Note:
1. V
IH
(max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns.
2. V
IL
(min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns.
3. Any input 0V ≤ V
IN
≤ V
CCQ
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
CAPACITANCE
T
A
= 25°C, f = 1MHz, V
CC
= 3.3V, V
REF
= 1.4V
±
200mV
Parameter
Input Capacitance (A0-A12)
Input Capacitance (RAS#,CAS#,WE#)
Input Capacitance (CKE0)
Input Capacitance (CK0)
Input Capacitance (CS0#)
Input Capacitance (DQM0-DQM7)
Input Capacitance (BA0-BA1)
Data Input/Output Capacitance (DQ0-DQ63)
Data input/output capacitance (CB0-CB7)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
IN6
C
IN7
C
OUT
C
OUT1
Max
36
36
36
20
36
7
36
9
9
Unit
pF
pF
pF
pF
pF
pF
pF
pF
pF
October 2004
Rev. 2
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
OPERATING CURRENT CHARACTERISTICS
V
CC
= 3.3V, 0°C
≤
T
A
≤
+70°C
W3DG7268V-AD1
PRELIMINARY
Version
Parameter
Operating Current
(One bank active)
Precharge Standby Current
in Power Down Mode
Active Standby Current in
Power-Down Mode
Symbol
I
CC1
Conditions
Burst Length = 1
t
RC
≤
t
RC
(min)
I
OL
= 0mA
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE
≥
V
IL
(max), t
CC
= 10ns
Io = mA
Page burst
4 Banks activated
t
CCD
= 2CK
t
RC
≥
t
RC
(min)
CKE
≤
0.2V
100/133
1080
Units
mA
Note
1
I
CC2
I
CC3
I
CC4
35
405
mA
mA
Operating Current (Burst mode)
1125
mA
1
Refresh Current
Self Refresh Current
Notes:
1. Measured with outputs open.
2. Refresh period is 64ms.
I
CC5
I
CC6
2205
54
mA
mA
2
October 2004
Rev. 2
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
W3DG7268V-AD1
PRELIMINARY
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
AC CHARACTERISTICS
PARAMETER
Access time from CLK (pos. edge)
CL = 3
CL = 2
Address hold time
Address setup time
CLK high-level width
CLK low-level width
Clock cycle time
CL = 3
CL = 2
CKE hold time
CKE setup time
CS#, RAS#, CAS#, WE#, DQM hold time
CS#, RAS#, CAS#, WE#, DQM setup time
Data-in hold time
Data-in setup time
Data-out high-impedance time
CL = 3
CL = 2
Data-out low-impedance time
Data-out hold time (load)
Data-out hold time (no load)
ACTIVE to PRECHARGE command
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
Refresh period (8,192 rows)
AUTO REFRESH period
PRECHARGE command period
ACTIVE bank a to ACTIVE bank b command
Transition time
WRITE recovery time
SYMBOL
t
AC(3)
t
AC(2)
t
AH
t
AS
t
CH
t
CL
t
CK(3)
t
CK(2)
t
CKH
t
CKS
t
CMH
t
CMS
t
DH
t
DS
t
HZ(3)
t
HZ(2)
t
LZ
t
OH
t
OHN
t
RAS
t
RC
t
RCD
t
REF
t
RFC
t
RP
t
RRD
t
T
t
WR
66
15
14
0.3
1 CLK +
7ns
14
Exit SELF REFRESH to ACTIVE command
t
XSR
67
1.2
1
2.7
1.8
37
60
15
64
66
20
15
0.3
1 CLK +
7ns
15
75
1.2
120K
0.8
1.5
2.5
2.5
7
7.5
0.8
1.5
0.8
1.5
0.8
1.5
5.4
5.4
1
2.7
1.8
44
66
20
64
120K
MIN
7
MAX
5.4
5.4
0.8
1.5
2.5
2.5
7.5
10
0.8
1.5
0.8
1.5
0.8
1.5
5.4
6
MIN
75/10
MAX
5.4
6
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
-
ns
ns
7
24
14, 25
20
28
10
10
23
23
NOTES
27
October 2004
Rev. 2
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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