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LTC1667

Description
PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28
Categorysemiconductor    logic   
File Size824KB,24 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
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LTC1667 Overview

PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28

LTC1667 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals28
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Rated supply voltage5 V
Maximum linear error0.0122 %
Processing package description5.30 MM, plastic, SSOP-28
stateACTIVE
CraftsmanshipBICMOS
packaging shapeRectangle
Package SizeSMALL OUTLINE, SHRINK PITCH
surface mountYes
Terminal formGULL WING
Terminal spacing0.6500 mm
terminal coatingtin lead
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelINDUSTRIAL
Rated negative supply voltage-5 V
Input formatParallel, WORD
Type of converterdigital to analog converter
Input bit encodingbinary
Rated settling time0.0200 us
Maximum analog output voltage1 V
Minimum analog output voltage-1 V

LTC1667 Preview

LTC1666/LTC1667/LTC1668
FEATURES
s
s
s
s
s
s
s
s
s
12-Bit, 14-Bit, 16-Bit,
50Msps DACs
DESCRIPTIO
The LTC
®
1666/LTC1667/LTC1668 are 12-/14-/16-bit,
50Msps differential current output DACs implemented on
a high performance BiCMOS process with laser trimmed,
thin-film resistors. The combination of a novel current-
steering architecture and a high performance process
produces DACs with exceptional AC and DC performance.
The LTC1668 is the first 16-bit DAC in the marketplace to
exhibit an SFDR (spurious free dynamic range) of 87dB
for an output signal frequency of 1MHz.
Operating from
±5V
supplies, the LTC1666/LTC1667/
LTC1668 can be configured to provide full-scale output
currents up to 10mA. The differential current outputs of
the DACs allow single-ended or true differential operation.
The – 1V to 1V output compliance of the LTC1666/
LTC1667/LTC1668 allows the outputs to be connected
directly to external resistors to produce a differential out-
put voltage without degrading the converter’s linearity. Al-
ternatively, the outputs can be connected to the summing
junction of a high speed operational amplifier, or to a
transformer.
The LTC1666/LTC1667/LTC1668 are pin compatible and
are available in a 28-pin SSOP and are fully specified over
the industrial temperature range.
, LTC and LT are registered trademarks of Linear Technology Corporation.
50Msps Update Rate
Pin Compatible 12-Bit, 14-Bit and 16-Bit Devices
High Spectral Purity: 87dB SFDR at 1MHz f
OUT
5pV-s Glitch Impulse
Differential Current Outputs
20ns Settling Time
Low Power: 180mW from
±5V
Supplies
TTL/CMOS (3.3V or 5V) Inputs
Small Package: 28-Pin SSOP
APPLICATIO S
s
s
s
s
s
s
s
s
Cellular Base Stations
Multicarrier Base Stations
Wireless Communication
Direct Digital Synthesis (DDS)
xDSL Modems
Arbitrary Waveform Generation
Automated Test Equipment
Instrumentation
TYPICAL APPLICATION
LTC1668, 16-Bit, 50Msps DAC
5V
0.1µF
V
DD
LTC1668
REFOUT
0.1µF
R
SET
2k
I
REFIN
2.5V
REFERENCE
52.3Ω
+
COMP1
C1
0.1µF
COMP2
C2
0.1µF
V
SS
AGND DGND
CLK
16-BIT
HIGH SPEED
DAC
52.3Ω
I
OUT B
V
OUT
1V
P-P
DIFFERENTIAL
SFDR (dB)
I
OUT A
+
LADCOM
DB15
DB0
1666/7/8 TA01
0.1µF
– 5V
CLOCK 16-BIT DATA
INPUT
INPUT
U
U
U
LTC1668 SFDR vs f
OUT
and f
CLOCK
100
5MSPS
90
25MSPS
80
50MSPS
70
60
DIGITAL AMPLITUDE = 0dBFS
0.1
1.0
f
OUT
(MHz)
1666/7/8
G05
50
10
100
1
LTC1666/LTC1667/LTC1668
ABSOLUTE
AXI U
RATI GS
Supply Voltage (V
DD
) ................................................ 6V
Negative Supply Voltage (V
SS
) ............................... – 6V
Total Supply Voltage (V
DD
to V
SS
) .......................... 12V
Digital Input Voltage .................... – 0.3V to (V
DD
+ 0.3V)
Analog Output Voltage
(I
OUT A
and I
OUT B
) ........ (V
SS
– 0.3V) to (V
DD
+ 0.3V)
PACKAGE/ORDER I FOR ATIO
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
1
2
3
4
5
6
7
8
9
DB0 (LSB) 10
NC 11
NC 12
NC 13
NC 14
G PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX
= 110°C,
θ
JA
= 100°C/W
TOP VIEW
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
1
2
3
4
5
6
7
8
9
28 DB12
27 DB13 (MSB)
26 CLK
25 V
DD
24 DGND
23 V
SS
22 COMP2
21 COMP1
20 I
OUT A
19 I
OUT B
18 LADCOM
17 AGND
16 I
REFIN
15 REFOUT
ORDER PART
NUMBER
LTC1667CG
LTC1667IG
DB2 10
DB1 11
DB0 (LSB) 12
NC 13
NC 14
G PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX
= 110°C,
θ
JA
= 100°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
2
U
U
W
W W
U
W
(Note 1)
Power Dissipation ............................................. 500mW
Operating Temperature Range
LTC1666C/LTC1667C/LTC1668C ........... 0°C to 70°C
LTC1666I/LTC1667I/LTC1668I .......... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
28 DB10
27 DB11 (MSB)
26 CLK
25 V
DD
24 DGND
23 V
SS
22 COMP2
21 COMP1
20 I
OUT A
19 I
OUT B
18 LADCOM
17 AGND
16 I
REFIN
15 REFOUT
ORDER PART
NUMBER
LTC1666CG
LTC1666IG
TOP VIEW
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
1
2
3
4
5
6
7
8
9
28 DB14
27 DB15 (MSB)
26 CLK
25 V
DD
24 DGND
23 V
SS
22 COMP2
21 COMP1
20 I
OUT A
19 I
OUT B
18 LADCOM
17 AGND
16 I
REFIN
15 REFOUT
ORDER PART
NUMBER
LTC1668CG
LTC1668IG
DB4 10
DB3 11
DB2 12
DB1 13
DB0 (LSB) 14
G PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX
= 110°C,
θ
JA
= 100°C/W
LTC1666/LTC1667/LTC1668
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 5V, V
SS
= – 5V, LADCOM = AGND = DGND = 0V, I
OUTFS
= 10mA.
SYMBOL PARAMETER
Resolution
Monotonicity
INL
DNL
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Error Drift
GE
Gain Error
Internal Reference, R
IREFIN
= 2k
External Reference,
V
REF
= 2.5V, R
IREFIN
= 2k
Internal Reference
External Reference
V
DD
= 5V
±5%
V
SS
= – 5V
±5%
f
CLK
= 25Msps, f
OUT
= 1MHz
0dB FS Output
– 6dB FS Output
–12dB FS Output
f
CLK
= 50Msps, f
OUT
= 1MHz
f
CLK
= 50Msps, f
OUT
= 2.5MHz
f
CLK
= 50Msps, f
OUT
= 5MHz
f
CLK
= 50Msps, f
OUT
= 20MHz
Spurious Free Dynamic
Range Within a Window
f
CLK
= 25Msps,
f
OUT
= 1MHz, 2MHz Span
f
CLK
= 50Msps,
f
OUT
= 5MHz, 4MHz Span
THD
Total Harmonic Distortion f
CLK
= 25Msps, f
OUT
= 1MHz
f
CLK
= 50Msps, f
OUT
= 5MHz
–75
–77
85
86
86
50
30
±0.1
±0.2
(Note 2)
(Note 2)
0.1
5
2
1
50
30
±0.1
±0.2
CONDITIONS
q
ELECTRICAL CHARACTERISTICS
MIN
12
12
LTC1666
TYP MAX
MIN
14
14
LTC1667
TYP MAX
MIN
16
14
LTC1668
TYP MAX
UNITS
Bits
Bits
DC Accuracy (Measured at I
OUT A
, Driving a Virtual Ground)
±1
±1
±0.2
0.1
5
±2
±1
±0.2
2
1
50
30
±1
0.1
5
±8
±4
±0.2
2
1
LSB
LSB
% FSR
ppm/°C
% FSR
% FSR
ppm/°C
ppm/°C
Gain Error Drift
PSRR
Power Supply
Rejection Ratio
Spurious Free Dynamic
Range to Nyquist
±0.1
% FSR/V
±0.2
% FSR/V
AC Linearity
SFDR
76
78
78
87
87
83
85
81
79
70
96
88
– 84
– 78
– 77
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
3
LTC1666/LTC1667/LTC1668
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 5V, V
SS
= – 5V, LADCOM = AGND = DGND = 0V, I
OUTFS
= 10mA.
SYMBOL
I
OUTFS
PARAMETER
Full-Scale Output Current
Output Compliance Range
Output Resistance; R
IOUT A
, R
IOUT B
Output Capacitance
Reference Output
Reference Voltage
Reference Output Drift
Reference Output Load Regulation
Reference Input
Reference Small-Signal Bandwidth
Power Supply
V
DD
V
SS
I
DD
I
SS
P
DIS
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Current
Negative Supply Current
Power Dissipation
I
FS
= 10mA, f
CLK
= 25Msps, f
OUT
= 1MHz
I
FS
= 10mA, f
CLK
= 25Msps, f
OUT
= 1MHz
I
FS
= 10mA, f
CLK
= 25Msps, f
OUT
= 1MHz
I
FS
= 1mA, f
CLK
= 25Msps, f
OUT
= 1MHz
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
q
LTC1666/LTC1667/LTC1668
MIN
TYP
MAX
1
–1
0.7
1.1
5
10
1
1.5
UNITS
mA
V
kΩ
pF
Analog Output
I
FS
= 10mA
I
OUT A, B
to LADCOM
q
q
REFOUT Tied to I
REFIN
Through 2kΩ
I
LOAD
= 0mA to 5mA
2.475
2.5
25
6
2.525
V
ppm/°C
mV/mA
I
FS
= 10mA, C
COMP1
= 0.1µF
4.75
–4.75
20
5
–5
3
33
180
85
50
75
20
8
15
5
4
4
50
q
q
q
kHz
5.25
–5.25
5
40
V
V
mA
mA
mW
mW
Msps
ns
ns
pV-s
pV-s
ns
ns
pA/√Hz
V
0.8
±10
V
µA
pF
ns
ns
ns
ns
Dynamic Performance (Differential Transformer Coupled Output, 50Ω Double Terminated, Unless Otherwise Noted)
f
CLOCK
t
S
t
PD
Maximum Update Rate
Output Settling Time
Output Propagation Delay
Glitch Impulse
t
r
t
f
i
NO
Digital Inputs
V
IH
V
IL
I
IN
C
IN
t
DS
t
DH
t
CLKH
t
CLKL
Digital High Input Voltage
Digital Low Input Voltage
Digital Input Current
Digital Input Capacitance
Input Setup Time
Input Hold Time
Clock High Time
Clock Low Time
q
q
q
q
To 0.1% FSR
Single Ended
Differential
Output Rise Time
Output Fall Time
Output Noise
2.4
5
8
4
5
8
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2:
For the LTC1666,
±1LSB
=
±0.024%
of full scale;
for the LTC1667,
±1LSB
=
±0.006%
of full scale =
±61ppm
of full scale;
for the LTC1668,
±1LSB
=
±0.0015%
of full scale =
±15.3ppm
of full scale.
4
LTC1666/LTC1667/LTC1668
TYPICAL PERFOR A CE CHARACTERISTICS
Single Tone SFDR at 50MSPS
0
–10
SFDR = 87dB
f
CLOCK
= 50MSPS
f
OUT
= 1.002MHz
AMPL = 0dBFS
= –8.25dBm
SIGNAL AMPLITUDE (dBFS)
SIGNAL AMPLITUDE (dBFS)
SIGNAL AMPLITUDE (dBFS)
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
5
15
FREQUENCY (MHz)
10
4-Tone SFDR, f
CLOCK
= 5MSPS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
0.1
50
0.46
0.82
1.18
1.54
FREQUENCY (MHz)
1.9
60
100
SIGNAL AMPLITUDE (dBFS)
SFDR (dB)
SFDR (dB)
SFDR > 82dB
f
CLOCK
= 5MSPS
f
OUT1
= 0.5MHz
f
OUT2
= 0.65MHz
f
OUT3
= 1.10MHz
f
OUT4
= 1.25MHz
AMPL = 0dBFS
SFDR vs f
OUT
and Digital Amplitude
(dBFS) at f
CLOCK
= 25MSPS
95
90
85
80
SFDR (dB)
SFDR (dB)
0dBFS
85
–6dBFS
–12dBFS
80
SFDR (dB)
75
70
65
60
55
50
0
2
6
f
OUT
(MHz)
4
8
10
1666/7/8 G07
U W
20
1666/7/8 G04
(LTC1668)
4-Tone SFDR, f
CLOCK
= 50MSPS
2-Tone SFDR
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
25
SFDR > 86dB
f
CLOCK
= 50MSPS
f
OUT1
= 4.9MHz
f
OUT2
= 5.09MHz
AMPL = 0dBFS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
SFDR > 74dB
f
CLOCK
= 50MSPS
f
OUT1
= 5.02MHz
f
OUT2
= 6.51MHz
f
OUT3
= 11.02MHz
f
OUT4
= 12.51MHz
AMPL = 0dBFS
–100
4.5
5.0
FREQUENCY (MHz)
5.5
1666/7/8 G02
1
4.6
8.2
11.8
15.4
FREQUENCY (MHz)
19
1666/7/8 G01
1666/7/8 G03
SFDR vs f
OUT
and f
CLOCK
100
SFDR vs f
OUT
and Digital Amplitude
(dBFS) at f
CLOCK
= 5MSPS
95
90
0dBFS
–6dBFS
–12dBFS
5MSPS
90
25MSPS
80
50MSPS
85
80
75
70
65
60
55
70
DIGITAL AMPLITUDE = 0dBFS
0.1
1.0
f
OUT
(MHz)
1666/7/8
G05
50
0
0.4
0.8
1.2
f
OUT
(MHz)
1.6
2.0
10
100
1666/7/8 G06
SFDR vs f
OUT
and Digital Amplitude
(dBFS) at f
CLOCK
= 50MSPS
90
0dBFS
85
80
75
70
65
60
55
50
95
90
SFDR vs f
OUT
and I
OUTFS
at
f
CLOCK
= 25MSPS
DIGITAL AMPLITUDE = 0dBFS
I
OUTFS
= 10mA
75
70
65
60
55
50
0
5
10
f
OUT
(MHz)
15
20
1666/7/8 G08
–12dBFS
–6dBFS
I
OUTFS
= 5mA
I
OUTFS
= 2.5mA
0
2.5
5
f
OUT
(MHz)
7.5
10
1666/7/8 G09
5

LTC1667 Related Products

LTC1667 LTC1666 LTC1668 LTC1666CG LTC1668IG LTC1668CG LTC1667CG LTC1667IG LTC1666IG
Description PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28 PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PDSO28
Number of functions 1 1 1 1 1 1 1 1 1
Number of terminals 28 28 28 28 28 28 28 28 28
Maximum operating temperature 85 Cel 85 Cel 85 Cel 70 °C 85 °C 70 °C 70 °C 85 °C 85 °C
Minimum operating temperature -40 Cel -40 Cel -40 Cel - -40 °C - - -40 °C -40 °C
surface mount Yes Yes Yes YES YES YES YES YES YES
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal location pair pair pair DUAL DUAL DUAL DUAL DUAL DUAL
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL
Input format Parallel, WORD Parallel, WORD Parallel, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD
Maximum analog output voltage 1 V 1 V 1 V 1 V 1 V 1 V 1 V 1 V 1 V
Minimum analog output voltage -1 V -1 V -1 V -1 V -1 V -1 V -1 V -1 V -1 V
Brand Name - - - Linear Technology Linear Technology Linear Technology Linear Technology Linear Technology Linear Technology
Is it Rohs certified? - - - incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code - - - SSOP SSOP SSOP SSOP SSOP SSOP
package instruction - - - SSOP, SSOP, SSOP28,.3 SSOP, SSOP28,.3 SSOP, SSOP, 5.30 MM, PLASTIC, SSOP-28
Contacts - - - 28 28 28 28 28 28
Manufacturer packaging code - - - G G G G G G
Reach Compliance Code - - - _compli _compli _compli _compli _compli _compli
ECCN code - - - EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
Converter type - - - D/A CONVERTER D/A CONVERTER D/A CONVERTER D/A CONVERTER D/A CONVERTER D/A CONVERTER
Enter bit code - - - BINARY BINARY BINARY BINARY BINARY BINARY
JESD-30 code - - - R-PDSO-G28 R-PDSO-G28 R-PDSO-G28 R-PDSO-G28 R-PDSO-G28 R-PDSO-G28
JESD-609 code - - - e0 e0 e0 e0 e0 e0
length - - - 10.2 mm 10.2 mm 10.2 mm 10.2 mm 10.2 mm 10.2 mm
Maximum linear error (EL) - - - 0.0244% 0.0122% 0.0122% 0.0122% 0.0122% 0.0244%
Humidity sensitivity level - - - 1 1 1 1 1 1
Nominal negative supply voltage - - - -5 V -5 V -5 V -5 V -5 V -5 V
Number of digits - - - 12 16 16 14 14 12
Package body material - - - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - - - SSOP SSOP SSOP SSOP SSOP SSOP
Package shape - - - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form - - - SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius) - - - 235 235 235 235 235 235
Certification status - - - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height - - - 2 mm 2 mm 2 mm 2 mm 2 mm 2 mm
Nominal settling time (tstl) - - - 0.02 µs 0.02 µs 0.02 µs 0.02 µs 0.02 µs 0.02 µs
Nominal supply voltage - - - 5 V 5 V 5 V 5 V 5 V 5 V
technology - - - BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS
Terminal surface - - - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal pitch - - - 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Maximum time at peak reflow temperature - - - 20 20 20 20 20 20
width - - - 5.3 mm 5.3 mm 5.3 mm 5.3 mm 5.3 mm 5.3 mm
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Current Status of Analog Design and Verification Tools
Since about the 1980s, many industry experts have claimed that analog circuits have reached a dead end and that digital applications will shine in the electronics world, including integrated circuits ...
咖啡不加糖 Analog electronics
my country's ultra-wideband (UWB) technology frequency usage regulations
1. Ultra-wideband (UWB) radio transmission equipment: The transmit signal bandwidth (-10dB bandwidth) of the device shall be at least 500MHz. 2. Ultra-wideband (UWB) radio equipment UWB transmit signa...
石榴姐 RF/Wirelessly

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