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DSPIC33EP256MU806-I-MR

Description
Digital Signal Processors & Controllers - DSP, DSC 64P 256KB Flash 28KB RAM 60MHz USB
Categorysemiconductor    The embedded processor and controller   
File Size4MB,615 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
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Digital Signal Processors & Controllers - DSP, DSC 64P 256KB Flash 28KB RAM 60MHz USB

DSPIC33EP256MU806-I-MR Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerMicrochip
Product CategoryDigital Signal Processors & Controllers - DSP, DSC
RoHSDetails
Mounting StyleSMD/SMT
Package / CaseQFN-64
ProductDSCs
CoredsPIC33EP
Maximum Clock Frequency340 MHz
Program Memory Size256 kB
Data RAM Size28 kB
Operating Supply Voltage3 V to 3.6 V
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
PackagingTube
Program Memory TypeFlash, RAM
Interface TypeECAN, I2C, SPI, UART, USB
Number of I/Os53 I/O
Data Bus Width16 bit
Number of Timers/Counters27 Timer
NumOfPackaging1
Processor SeriesdsPIC33E
Factory Pack Quantity40
Unit Weight0.007277 oz
dsPIC33EPXXX(GP/MC/MU)806/810/814
and PIC24EPXXX(GP/GU)810/814
16-bit Microcontrollers and Digital Signal Controllers (up to 512 KB Flash
and 52 KB SRAM) with High-Speed PWM, USB, and Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
Timers/Output Compare/Input Capture
• 27 General Purpose Timers:
- Nine 16-bit and up to four 32-bit Timers/Counters
- 16 OC modules configurable as Timers/Counters
- Two 32-bit Quadrature Encoder Interface (QEI)
modules configurable as Timers/Counters
• 16 IC modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Core: 16-bit dsPIC33E/PIC24E CPU
Code-efficient (C and Assembly) architecture
Two 40-bit wide accumulators
Single-cycle (MAC/MPY) with dual data fetch
Single-cycle mixed-sign MUL plus hardware divide
32-bit multiply support
Clock Management
2% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Fast wake-up and start-up
Communication Interfaces
• USB 2.0 OTG-compliant full-speed interface
• Four UART modules (15 Mbps)
- Supports LIN 2.0 protocols and IrDA
®
• Four 4-wire SPI modules (15 Mbps)
• Two ECAN™ modules (1 Mbaud) CAN 2.0B support
• Two I
2
C modules (up to 1 Mbaud) with SMBus support
• Data Converter Interface (DCI) module with support for
I
2
S and Audio codecs
• PPS to allow function remap
• Parallel Master Port (PMP)
• Programmable Cyclic Redundancy Check (CRC)
Power Management
Low-power management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
1.0 mA/MHz dynamic current (typical)
60 µA I
PD
current (typical)
High-Speed PWM
Up to seven PWM pairs with independent timing
Dead Time for rising and falling edges
8.32 ns PWM resolution
PWM support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault inputs
• Flexible trigger configurations for ADC conversions
Direct Memory Access (DMA)
• 15-channel DMA with user-selectable priority arbitration
• UART, USB, SPI, ADC, ECAN, IC, OC, Timers,
DCI/I
2
S, PMP
Input/Output
Sink/Source 10 mA on all pins
5V-tolerant pins
Selectable open drain, pull-ups, and pull-downs
Up to 5 mA overvoltage clamp current
External interrupts on all I/O pins
Advanced Analog Features
• Two independent ADC modules:
- One ADC configurable as 10-bit, 1.1 Msps with four
S&H or 12-bit, 500 ksps with one S&H
- One 10-bit ADC, 1.1 Msps with four S&H
- Eight S&H using both ADC 10-bit modules
- 24 analog channels (64-pin devices) up to 32 analog
channels (100/121/144-pin devices)
• Flexible and independent ADC trigger sources
• Comparators:
- Up to three Analog Comparator modules
- Programmable references with 32 voltage points
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
In-circuit and in-application programming
Five program and three complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Trace and run-time watch
Packages
Type
QFN
TQFP
TQFP
100
83
0.40
12x12x1
0.50
14x14x1
TFBGA
121
83
0.50
10x10x1.2
LQFP
144
122
0.50
20x20x1.4
Pin Count
64
64
144
I/O Pins (up to)
53
53
122
Contact/Lead Pitch
0.50
0.50
0.40
Dimensions
9x9x0.9
10x10x1
16x16x1
Note:
All dimensions are in millimeters (mm) unless specified.
©
2009-2012 Microchip Technology Inc.
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