EEWORLDEEWORLDEEWORLD

Part Number

Search

5CEFA7F27C8N

Description
FPGA - Field Programmable Gate Array FPGA - Cyclone V E 5648 LABs 336 IOs
Categorysemiconductor    Programmable logic devices   
File Size835KB,41 Pages
ManufacturerAltera (Intel)
Download Datasheet Parametric View All

5CEFA7F27C8N Online Shopping

Suppliers Part Number Price MOQ In stock  
5CEFA7F27C8N - - View Buy Now

5CEFA7F27C8N Overview

FPGA - Field Programmable Gate Array FPGA - Cyclone V E 5648 LABs 336 IOs

5CEFA7F27C8N Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerAltera (Intel)
Product CategoryFPGA - Field Programmable Gate Array
RoHSDetails
ProductCyclone V E
Number of Logic Elements149500
Number of Logic Array Blocks - LABs56480
Number of I/Os336 I/O
Operating Supply Voltage1.1 V
Minimum Operating Temperature0 C
Maximum Operating Temperature+ 70 C
Mounting StyleSMD/SMT
Package / CaseFBGA-672
PackagingTray
Embedded Block RAM - EBR836 kbit
Maximum Operating Frequency800 MHz
Moisture SensitiveYes
NumOfPackaging1
Factory Pack Quantity40
Total Memory7696 kbit
2016.06.10
Cyclone V Device Overview
Subscribe
Send Feedback
CV-51001
The Cyclone
®
V devices are designed to simultaneously accommodate the shrinking power consumption,
cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and
cost-sensitive applications.
Enhanced with integrated transceivers and hard memory controllers, the Cyclone V devices are suitable
for applications in the industrial, wireless and wireline, military, and automotive markets.
Cyclone V Device Handbook: Known Issues
Lists the planned updates to the Cyclone V Device Handbook chapters.
Related Information
Key Advantages of Cyclone V Devices
Table 1: Key Advantages of the Cyclone V Device Family
Advantage
Supporting Feature
Lower power consumption • Built on TSMC's 28 nm low-power (28LP) process technology and
includes an abundance of hard intellectual property (IP) blocks
• Up to 40% lower power consumption than the previous generation
device
Improved logic integration • 8-input adaptive logic module (ALM)
and differentiation capabil‐ • Up to 13.59 megabits (Mb) of embedded memory
ities
• Variable-precision digital signal processing (DSP) blocks
Increased bandwidth
capacity
Hard processor system
(HPS) with integrated
ARM
®
Cortex
-A9
MPCore processor
• 3.125 gigabits per second (Gbps) and 6.144 Gbps transceivers
• Hard memory controllers
• Tight integration of a dual-core ARM Cortex-A9 MPCore processor,
hard IP, and an FPGA in a single Cyclone V system-on-a-chip (SoC)
• Supports over 128 Gbps peak bandwidth with integrated data coherency
between the processor and the FPGA fabric
2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at
www.altera.com/common/legal.html.
Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
©
ISO
9001:2008
Registered
www.altera.com
101 Innovation Drive, San Jose, CA 95134
How to use ramdisk to create a virtual boot floppy disk? (Installing vxworks on VMWare)
My system is XP SP2, ramdisk2.0, install vxworks on VMWare...
haxinglong Real-time operating system RTOS
Help: Two MCUs communicating via I2C?
I want to use two IO ports, one for SCL and one for SDA, to realize communication between two MCUs, one MCU as the host and the other as the slave. The host is easy to realize because the SCL signal i...
lefantian MCU
iTOP-4412 development board android4.4 code download and compile
Based on the iTOP4412 development board,the Android source code can be obtained from the CD, network disk, and the stable version can also be downloaded from GitHub.GitHub only provides source code do...
马佳徐徐 Embedded System
The teacher asked me to make a PID control motor experiment box for the process control course! ~
What chip do you think is good for the main control? I am currently planning to use PIC18F series or STM32 and LM3S. Which one do you think should I choose? ~The main purpose is to use the main contro...
wanghongyang MCU
C language beginner video tutorial sharing
Today I am sharing a C language video tutorial for beginners. The video mainly explains the basics of C language, which can help beginners learn C language. Friends who need it can download it and wat...
深入细化 Embedded System
Fujitsu and Tokyo Institute of Technology jointly develop 256M FeRAM
Fujitsu Microelectronics (Shanghai) Co., Ltd. recently announced that Tokyo Institute of Technology (Tokyo-Tech), Fujitsu Laboratories Ltd. and Fujitsu Limited have jointly developed a new material fo...
fighting Industrial Control Electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2907  1387  1297  2873  746  59  28  27  58  16 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号