BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
Rev. 4 — 1 September 2015
Product data sheet
1. Product profile
1.1 General description
110 W LDMOS power transistor for base station applications at frequencies from
1800 MHz to 2000 MHz.
Table 1.
Typical performance
RF performance at T
case
= 25
C in a common source class-AB production test circuit.
Mode of operation
2-carrier W-CDMA
[1]
f
(MHz)
1930 to 1990
V
DS
(V)
28
P
L(AV)
(W)
25
G
p
(dB)
19
D
(%)
32
IMD3
(dBc)
34
[1]
ACPR
(dBc)
38
[1]
Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7 dB at 0.01 % probability on CCDF per carrier; carrier
spacing 10 MHz.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features
Typical 2-carrier W-CDMA performance at frequencies of 1930 MHz and 1990 MHz,
a supply voltage of 28 V and an I
Dq
of 900 mA:
Average output power = 25 W
Power gain = 19 dB
Efficiency = 32 %
IMD3 =
34
dBc
ACPR =
38
dBc
Easy power control
Integrated ESD protection
Excellent ruggedness
High efficiency
Excellent thermal stability
Designed for broadband operation (1800 MHz to 2000 MHz)
Internally matched for ease of use
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
1.3 Applications
RF power amplifiers for GSM, GSM EDGE, W-CDMA and CDMA base stations and
multicarrier applications in the 1800 MHz to 2000 MHz frequency range
2. Pinning information
Table 2.
Pin
1
2
3
Pinning
Description
drain
gate
source
[1]
Simplified outline
Graphic symbol
BLF6G20-110 (SOT502A)
1
3
2
2
3
sym112
1
BLF6G20LS-110 (SOT502B)
1
2
3
drain
gate
source
[1]
1
3
2
2
1
3
sym112
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name
BLF6G20-110
-
Description
flanged LDMOST ceramic package; 2 mounting holes;
2 leads
earless flanged LDMOST ceramic package; 2 leads
Version
SOT502A
SOT502B
Type number
BLF6G20LS-110 -
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
I
D
T
stg
T
j
Parameter
drain-source voltage
gate-source voltage
drain current
storage temperature
junction temperature
Conditions
Min
-
0.5
-
65
-
Max
65
+13
29
+150
225
Unit
V
V
A
C
C
BLF6G20-110_BLF6G20LS-110#4
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
2 of 11
BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
5. Thermal characteristics
Table 5.
Symbol
R
th(j-case)
Thermal characteristics
Parameter
thermal resistance from
junction to case
Conditions
T
case
= 80
C;
P
L
= 25 W (CW)
Type
BLF6G20-110
BLF6G20LS-110
Typ
0.52
0.45
Unit
K/W
K/W
6. Characteristics
Table 6.
Characteristics
T
j
= 25
C unless otherwise specified.
Symbol Parameter
V
(BR)DSS
drain-source breakdown
voltage
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
C
rs
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
drain-source on-state
resistance
feedback capacitance
Conditions
V
GS
= 0 V; I
D
= 0.5 mA
V
DS
= 10 V; I
D
= 150 mA
V
DS
= 28 V; I
D
= 950 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 13 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 7.5 A
V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 5.25 A
V
GS
= 0 V; V
DS
= 28 V;
f = 1 MHz
Min
65
1.4
1.6
-
22.3
-
-
-
-
Typ
-
2
2.1
-
27
-
10.5
0.1
2.1
Max
-
2.4
2.6
5
-
450
-
Unit
V
V
V
A
A
nA
S
0.160
-
pF
7. Application information
Table 7.
Application information
Mode of operation: 2-carrier W-CDMA; PAR 7 dB at 0.01 % probability on CCDF; 3GPP test
model 1; 1-64 PDPCH; f
1
= 1932.5 MHz; f
2
= 1942.5 MHz; f
3
= 1977.5 MHz; f
4
= 1987.5 MHz;
RF performance at V
DS
= 28 V; I
Dq
= 900 mA; T
case
= 25
C; unless otherwise specified; in a
class-AB production test circuit.
Symbol
P
L(AV)
G
p
D
IMD3
ACPR
Parameter
average output power
power gain
drain efficiency
third order intermodulation distortion
adjacent channel power ratio
P
L(AV)
= 25 W
P
L(AV)
= 25 W
P
L(AV)
= 25 W
P
L(AV)
= 25 W
Conditions
Min
-
18
28
-
-
Typ
25
19
32
34
38
Max
-
-
-
28
33
Unit
W
dB
%
dBc
dBc
7.1 Ruggedness in class-AB operation
The BLF6G20-110 and BLF6G20LS-110 are capable of withstanding a load mismatch
corresponding to VSWR = 10 : 1 through all phases under the following conditions:
V
DS
= 28 V; I
Dq
= 900 mA; P
L
= 110 W (CW); f = 1990 MHz.
BLF6G20-110_BLF6G20LS-110#4
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
3 of 11
BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
7.2 One-tone CW
22
G
p
(dB)
20
η
D
001aaj072
60
η
D
(%)
45
G
p
18
30
16
15
14
0
20
40
60
80
100
0
120
140
P
L(PEP)
(W)
V
DS
= 30 V; I
Dq
= 1400 mA; f = 1960 MHz.
Fig 1.
One-tone CW power gain and drain efficiency as function of load power;
typical values
7.3 Two-tone CW
22
G
p
(dB)
20
η
D
001aaj073
60
η
D
(%)
45
−10
IMD3
(dBc)
−30
001aaj074
IMD3
G
p
18
30
IMD5
IMD7
−50
16
15
14
0
20
40
60
0
80
100
P
L(PEP)
(W)
−70
0
20
40
60
80
100
P
L(PEP)
(W)
V
DS
= 30 V; I
Dq
= 1400 mA; f = 1960 MHz.
V
DS
= 30 V; I
Dq
= 1400 mA; f = 1960 MHz.
Fig 2.
Two-tone CW power gain and drain efficiency
as function of peak envelope load power;
typical values
Fig 3.
Two-tone CW intermodulation distortion as a
function of peak envelope load power; typical
values
BLF6G20-110_BLF6G20LS-110#4
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
4 of 11
BLF6G20-110; BLF6G20LS-110
Power LDMOS transistor
8. Test information
C3
C4
C5
R1
R2
C7
C6
C10
Q1
C9
C8
C1
C14
C15
C16
C2
C11
C12
C13
INPUTBOARD
TB
OUTPUTBOARD
TB
001aah517
The striplines are on a double copper-clad Taconic RF35 Printed-Circuit Board (PCB) with
r
= 3.5
and thickness = 0.76 mm.
See
Table 8
for list of components.
Fig 4.
Table 8.
C1
C2
C3
C4, C8
Component layout
List of components (see
Figure 4).
Description
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
electrolytic capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
BLF6G20-110 or BLF6G20LS-110
SMD resistor
SMD resistor
Value
8.2 pF
10 pF
100
F;
63 V
4.7
F;
25 V
220 nF; 50 V
13 pF
330 nF; 50 V
1.0 pF
1.5 pF
0.6 pF
-
1.0
2.7
[2]
[3]
[1]
[3]
[1]
[1]
[1]
[1]
[1]
Component
Remarks
C5, C7, C12, C13
C6, C10, C11
C9
C14
C15
C16
Q1
R1
R2
[1]
[2]
[3]
BLF6G20-110_BLF6G20LS-110#4
American Technical Ceramics type 100B or capacitor of same quality.
TDK or capacitor of same quality.
AVX or capacitor of same quality.
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
5 of 11
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