PI3A125
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
SOT
INY
TM
Low Voltage SPST
Analog Switch/Bus Switch
Features
• Low Voltage, SPST Switch
– V
CC
from 2.3V to 3.6V
• Low On-Resistance: 6 ohms at 3.0V
• CMOS Technology for Bus and Analog Applications
• Rail-to-Rail Signal Range
• Low Power: 30μW at 3.0V
• High Speed: 4ns
• High Off Isolation: 65dB at 1MHz
• High Bandwidth: 250 MHz
• Extended Industrial Temperature Range: –40°C to 85°C
• Improved, Direct Replacement for SN74CBTLV1G125
• Packaging (Pb-free & Green available):
– 5-pin SC70 (C5)
– 5-pin SOT23 (T5)
OE
1
Description
The PI3A125 is a high-speed CMOS SPST switch that can be used
in analog or low-delay bus switch applications.
Specified over a wide operating power supply voltage range, 2.3V
to 3.6V, the PI3A125 has a low maximum ON resistance of 10-ohm
at 2.3V and 7 ohms at 3V. The CMOS device features rail-to-rail
signal range. The switch is turned off when the OE input is high.
Power requirements at 3V are a low 30μW.
The PI3A125 is an improved, direct replacement for the
SN74CBTLV1G125. Pericom improvements include lower resis-
tance and detailed analog switch specifications.
Connection Diagram
PI3A125
5
V
CC
Applications
• Cell Phones
• Computer Peripherals
• Bus Isolation
• Servers/Routers
• Data Communications
• PDAs
• Portable Instrumentation
• Battery Powered Communications
GND
3
4
B
A
2
Pin Description
Pin Numbe r
1
2
3
4
5
Name
OE
Port A
GND
Port B
V
CC
De s cription
Enable Logic Input
Input/Output (Bidirectional)
Ground
Input/Output (Bidirectional)
Positive Power Supply
Logic Function Table
OE
0
1
Function
ON
O FF
09-0002
1
PS8575C
10/26/09
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
Absolute Maximum Ratings &
Thermal Information
(1)
Supply Voltage V
CC
............................................... –0.5V to 4.6V
Input Voltage Range, V
I
......................................... –0.5V to 4.6V
Continuous Channel Current ............................................ 128mA
Package Thermal Impedance,
θ
JA
SOT23 package ....................................................... 206°C/W
SC70 package .......................................................... 252°C/W
Storage Temperature Range, T
stg
....................... –65°C to 150°C
Notes:
1. Stresses beyond those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any
other conditions beyond those indicated under “Recommended
Operating Conditions” is not implied. Exposure to absolute-maxi-
mum-rated conditions for extended periods may affect device
reliability.
Recommended Operating Conditions
(1)
V
CC
V
IH
V
IL
T
A
Supply Voltage
High- Level Control Input Voltage
Low- Level Control Input Voltage
Operating Free- Air Temperature
M in.
2.3
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
–4 0
1.7
2
M a x.
3. 6
Units
V
0.7
0.8
85
°C
Note:
1. To ensure proper device operation, all unused control inputs of the device must be held at V
CC
or GND.
DC Electrical Characteristics
(Over the Operating temperature range, T
A
= –40°C to 85°C)
Parame te r
V
CC
R
ON
De s cription
Analog Voltage Range
I
I
= 64mA, V
I
= 0V
ON Resistance
I
I
= 24mA, V
I
= 0V
I
I
= 15mA, V
I
= 1.7V
I
I
= 64mA, V
I
= 0V
R
ON
ON Resistance
(4)
I
I
= 24mA, V
I
= 0V
I
I
= 15mA, V
I
= 2.4V
V
IH
V
IL
I
IN
I
OFF
I
CC
C
IN
C
IO(OFF)
C
IO(ON)
09-0002
Te s t Conditions
SupplyVoltage
V
CC
2.3V
M in.
2.3
Typ
M ax. Units
3. 6
V
7
7
15
5
9
9
22
6
6
13
Ω
3V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
1.7
2
5
10
Input High Logic Voltage
Input Low Logic Voltage
Input Logic Current
OFF State Leakage Current
Quiescent Supply Current
Control Input Capacitance
Capacitance of OFF Switch
Capacitance of ON Switch
I
O
= 0mA, V
I
= V
CC
or GND
V
I
= 3V or 0
V
O
= 3V or GND
f = 1 MHz
V
IN
= Logic High Minimum or
V
IN
= Logic Low Maximum
0.7
0.8
± 1. 0
± 50
10
2.5
7
16
V
V
CC
= 2.7V to 3.6V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
μ
A
pF
PS8575C
10/26/09
2
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
Switch and AC Characteristics
Parame te r
t
PD
t
EN
t
DIS
Q
OIRR
f
3dB
De s cription
Propagation Delay
(2)
Enable Turn ON Time
Output Disable Turn OFF
Time
Charge Injection
Off Isolation
–3dB Bandwidth
f = 1 MHz
Te s t Conditions
Supply Voltage
V
CC
= 2.5V ±0.2V
V
CC
= 3.3V ±0.3V
V
CC
= 2.5V ±0.2V
V
CC
= 3.3V ±0.3V
V
CC
= 2.5V ±0.2V
V
CC
= 3.3V ±0.3V
V
CC
= 3.3V
V
CC
= 3.3V
V
CC
= 3.3V
1
1
1
1
7
–65
TBD
M in. Typ.
(1)
M ax.
0 . 35
0 . 25
5
4 .5
5
4 .1
pC
dB
MHz
ns
Units
Notes:
1. All typical values are at T
A
= 25°C and V
CC
= 3.3V.
2. Propagation delay is the calculated RC time constant of the typical On-resistance of the switch and a total load capacitance of 50pF, when
driven by an ideal voltage source with zero source impedance.
09-0002
3
PS8575C
10/26/09
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
Test Circuits and Timing Diagrams
V
CC
= 2.5V ±0.2V
S1
From Output
Under Test
(See Note 1)
2 x V
CC
Open
GND
Te s t
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
Open
2 x V
CC
GND
C
L
= 30pF
Load Circuit
Output
Control
(Low Level
Enabling)
V
CC
V
CC
/2
0V
t
PHL
V
OH
V
CC
V
CC
/2
t
PZL
V
CC
/2
V
OL
+0.15V
t
PZH
V
CC
/2
t
PHZ
V
OH
–0.15V
V
OH
0V
V
OL
V
CC
/2
0V
t
PLZ
V
CC
Input
V
CC
/2
t
PLH
Output
Waveform 1
S1 at 2 x V
CC
(see Note 2)
Output
Waveform 2
S1 at GND
(see Note 2)
Output
V
CC
/2
V
CC
/2
V
OL
Voltage Waveforms
Propagation Delay Times
Voltage Waveforms
Propagation Delay Times
Figure 1. Test Circuit and Voltage Waveforms for V
CC
= 2.5V
Notes:
1. C
L
includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR <10 MHz, Z
O
= 50Ω, t
r
≤
2ns, t
f
≤
2ns.
4. The outputs are measured one at a time with one transition per measurement.
5. t
PLZ
and t
PHZ
are the same as t
dis
.
6. t
PZL
and t
PZH
are the same as t
en
.
7. t
PLH
and t
PHL
are the same as t
pd
.
09-0002
PS8575C
10/26/09
4
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI3A125
SOT
INY
Low Voltage SPST
Analog Switch/Bus Switch
Test Circuits and Timing Diagrams
(continued)
V
CC
= 3.3V ±0.3V
2 x V
CC
From Output
Under Test
(See Note 1)
500-Ohm
S1
Open
GND
Te s t
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
Open
2 x V
CC
GND
C
L
= 50pF
500-Ohm
Load Circuit
Output
Control
(Low Level
Enabling)
V
CC
V
CC
/2
0V
t
PHL
V
OH
V
CC
V
CC
/2
t
PZL
V
CC
/2
V
OL
+0.15V
t
PZH
V
CC
/2
t
PHZ
V
OH
–0.15V
V
OH
0V
V
OL
V
CC
/2
0V
t
PLZ
V
CC
Input
V
CC
/2
t
PLH
Output
Waveform 1
S1 at 2 x V
CC
(see Note 2)
Output
Waveform 2
S1 at GND
(see Note 2)
Output
V
CC
/2
V
CC
/2
V
OL
Voltage Waveforms
Propagation Delay Times
Voltage Waveforms
Propagation Delay Times
Figure 2. Test Circuit and Voltage Waveforms for V
CC
= 3.3V
Notes:
1. C
L
includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR <10 MHz, Z
O
= 50Ω, t
r
≤
2ns, t
f
≤
2ns.
4. The outputs are measured one at a time with one transition per measurement.
5. t
PLZ
and t
PHZ
are the same as t
dis
.
6. t
PZL
and t
PZH
are the same as t
en
.
7. t
PLH
and t
PHL
are the same as t
pd
.
09-0002
5
PS8575C
10/26/09
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