NanoAmp Solutions, Inc.
1982 Zanker Road, San Jose, CA 95112
ph: 408-573-8878, FAX: 408-573-8877
www.nanoamp.com
EM128C08
EM128C08 Family
128Kx8 Bit Ultra-Low Power Asynchronous Static RAM
Overview
The EM128C08 is an integrated memory device
containing a low power 1 Mbit Static Random
Access Memory organized as 131,072 words by 8
bits. The device is fabricated using NanoAmp’s
advanced CMOS process and high-speed/low-
power circuit technology. This device is designed
for very low voltage operation making it quite suit-
able for battery powered devices.
It is also
designed for both very low operating and standby-
currents. The device pinout is compatible with
other standard 128Kx8 SRAMs.
Features
•
•
•
Extremely Wide Operating Voltage
1.5 to 3.6 Volts
Extended Temperature Range
Standard: -20
o
to +80
o
C
Fast Cycle Time
Standard: < 70 ns @ 3 Volts
-10: < 100 ns @ 3 Volts
Very Low Operating Current
I
CC
< 1 mA maximum at 2V, 1 Mhz
Very Low Data Rentention Voltage
1.2 Volts Minimum
Very Low Standby Current
1
µA
max. @ 55
o
C
32-Pin TSOP, STSOP, SOP and 48-Pin
BGA Packages Available
•
•
•
•
FIGURE 1: Operating Envelope
20
14 Mhz
15
10 Mhz
Typical I
CC
(mA)
10
5 Mhz
5
2.5 Mhz
1 Mhz
0
1
2
V
CC
(V)
3
4
Stock No. 23005-07 6/99
1
NanoAmp Solutions
FIGURE 1: Pin Configurations
OE
A10
CE1
D7
D6
D5
D4
D3
VSS
D2
D1
D0
A0
A1
A2
A3
EM128C08
NC
A16
A14
A12
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
V
CC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
D7
D6
D5
D4
D3
1
A
B
C
D
E
F
G
H
A5
A4
NC
NC
NC
A1
A3
A2
2
A7
A6
A12
NC
NC
D1
A0
D0
3
4
5
6
A9
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A16 V
CC
WE
A14 A15 A13 A11
NC
NC
NC
NC
D2
V
SS
NC CE2
NC
NC
NC
D4
D3
NC
NC
D5
D7
D6
A8
NC
NC
CE1
OE
A10
EM128C08
STSOP, TSOP
A6
A5
A4
A3
A2
A1
A0
D0
EM12808
SOP
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D1
D2
V
SS
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
48 Pin BGA (top)
7mm x 9mm
FIGURE 2: Functional Block Diagram
Input/
Data I/O
Output
Mux
and
D
0
- D
7
Buffers
Address
Inputs
A
0
- A
16
Address
Decode
Logic
128K x 8
RAM Array
CE1
CE2
WE
OE
Pin Name
A0-A16
D0-D7
CE1
CE2
OE
Control
Logic
TABLE 1: Pin Description
Pin Function
Address Inputs
Data Inputs/Outputs
Chip Enable (Active Low)
Chip Enable (Active High)
Output Enable (Active Low)
Pin Name
WE
V
CC
V
SS
NC
Pin Function
Write Enable (Active Low)
Power
Ground
Not Connected (Do not connect signal)
TABLE 2: Functional Description
CE1
H
X
L
L
L
CE2
X
L
H
H
H
WE
X
X
L
H
H
OE
X
X
X
L
H
D0-D7
High Z
High Z
Data In
Data Out
High Z
MODE
Standby
Standby
Write
Read
Active
POWER
Standby
Standby
Active -> Standby*
Active -> Standby*
Standby*
*The device will consume active power in this mode whenever addresses are changed
Stock No. 23005-07 6/99
2
NanoAmp Solutions
TABLE 3: Absolute Maximum Ratings*
Item
Voltage on any pin relative to V
SS
Voltage on V
CC
Supply Relative to V
SS
Power Dissipation
Storage Temperature
Operating Temperature
Symbol
V
IN,OUT
V
CC
P
D
T
STG
T
A
Rating
–0.3 to V
CC
+0.3
–0.3 to 4.0
500
–40 to +125
-20 to +80
EM128C08
Unit
V
V
mW
o
C
o
C
*Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operating section of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
TABLE 4: Operating Characteristics (Over the Specified Temperature Range)
EM128C08
Item
Operating Supply Voltage
Data Retention Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
Operating Supply Current (Note
1)
Standby Current (Note 2), and
Data Retention
Current
Symbol
V
CC
V
DR
V
IH
V
IL
V
OH
V
OL
I
LI
I
LO
I
CC
I
OH
= -0.1mA
I
OL
= 0.1mA
V
IN
= 0 to V
CC
OE or CE1 = V
CC
or CE2 = 0
V
IN
= V
CC
or 0V
CE1 = 0 and CE2 = V
CC
V
IN
=V
CC
or 0V, t
A
=25
o
C
I
SB,
I
DR
V
IN
=V
CC
or 0V, t
A
=55
o
C
V
IN
=V
CC
or 0V, t
A
=80
o
C
CE1 = V
CC
or CE2 = 0
Test Conditions
Min.
1.5
1.2
0.7V
CC
–0.3
0.8*V
CC
0.2*V
CC
0.5
0.5
0.5*f*V
0.2
1
10
µA
V
CC
+0.3
0.3*V
CC
Max.
3.6
V
V
V
V
V
V
µA
µA
mA
Unit
Note 1. Operating current is a linear function of operating frequency and voltage. You may calculate operating current
using the formula shown with operating frequency (f) expressed in Mhz and operating voltage (V) in volts. Example:
Operating at 2 Mhz at 3.0 volts will draw a maximum current of 0.5*2*3 = 3.0 mA.
Note 2. This device assumes a standby mode if either CE1 is disabled (high) or CE2 is disabled (low). It will also
automatically go into a standby mode whenever all input signals are quiescent (not toggling) regardless of the state of
CE1 or CE2. In order to achieve low standby current in the enabled mode (CE1 low and CE2 high), all inputs must be
within 0.2 volts of either V
CC
or V
SS
.
TABLE 5: Capacitance*
Item
Input Capacitance
I/O Capacitance
Symbol
C
IN
C
I/O
Test Condition
V
IN
= 0V, f = 1 Mhz, T
A
= 25
o
C
V
IN
= 0V, f = 1 Mhz, T
A
= 25
o
C
Min
Max
5
5
Unit
pF
pF
Note: These parameters are verified in device characterization and are not 100% tested
Stock No. 23005-07 6/99
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NanoAmp Solutions
EM128C08
TABLE 6: Timing Test Conditions
Item
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Operating Temperature - Standard Version
Operating Temperature - Commercial Version
Output Load
0.1V
CC
to 0.9 V
CC
5ns
0.5V
CC
-40 to +85
o
C
-20 to +80
o
C
CL = 50pF
TABLE 7: Timing - EM128C08 (Standard Version) Only
1.5 to 3.6 V 1.8 to 3.6 V 2.7 to 3.6 V 3.0 to 3.6 V
Item
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Address Set-Up Time
Write Pulse Width
Write Recovery Time
Write to High-Z Output
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
Symbol
Min
t
RC
t
AA
t
CE
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
0
200
0
10
0
0
0
0
10
500
500
500
0
250
0
50
0
80
0
10
100
100
500
500
500
100
0
0
0
0
10
200
200
200
0
100
0
40
0
40
0
10
50
50
Max
Min
200
200
200
50
0
0
0
0
10
85
85
85
0
40
0
20
0
30
0
10
20
20
Max
Min
85
85
85
20
0
0
0
0
10
70
70
70
0
35
0
20
20
20
Max
Min
70
70
70
20
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Stock No. 23005-07 6/99
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NanoAmp Solutions
EM128C08
TABLE 8: Timing - EM128C08-10 Version
1.5 to 3.6 V 1.8 to 3.6 V 2.7 to 3.6 V 3.0 to 3.6 V
Item
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Address Set-Up Time
Write Pulse Width
Write Recovery Time
Write to High-Z Output
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
Symbol
Min
t
RC
t
AA
t
CE
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
0
300
0
10
0
0
0
0
10
500
500
500
0
300
0
100
0
80
0
10
100
100
500
500
500
100
0
0
0
0
10
300
300
300
0
100
0
60
0
40
0
10
60
60
Max
Min
300
300
300
60
0
0
0
0
10
120
120
120
0
50
0
25
0
30
0
10
25
25
Max
Min
120
120
120
25
0
0
0
0
10
100
100
100
0
40
0
25
25
25
Max
Min
100
100
100
25
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
FIGURE 3: Read Cycle Timing (WE = V
IH
)
t
RC
A0-A16
t
AA
t
CE
CE1/CE2
t
LZ
OE
t
OLZ
D0-D7
Data Valid
t
OH
t
OE
Enable Valid
t
OHZ
t
HZ
Stock No. 23005-07 6/99
5
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