BLF7G24L-160P;
BLF7G24LS-160P
Power LDMOS transistor
Rev. 6 — 1 September 2015
Product data sheet
1. Product profile
1.1 General description
160 W LDMOS power transistor for base station applications at frequencies from
2300 MHz to 2400 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in a common source class-AB production test circuit.
Test signal
IS-95
[1]
f
(MHz)
2300 to 2400
I
Dq
(mA)
1200
V
DS
(V)
28
P
L(AV)
(W)
30
G
p
(dB)
18.5
D
(%)
27.5
ACPR
885k
(dBc)
45.5
[1]
Single carrier IS-95 with pilot, paging, sync and 6 traffic channels (Walsh codes 8 - 13). PAR = 9.7 dB at
0.01 % probability on the CCDF. Channel bandwidth is 1.2288 MHz.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low R
th
providing excellent thermal stability
Designed for broadband operation (2300 MHz to 2400 MHz)
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for base stations and multi carrier applications in the 2300 MHz to
2400 MHz frequency range
BLF7G24L-160P; BLF7G24LS-160P
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
Pinning
Description
drain1
drain2
gate1
gate2
source
[1]
Simplified outline
Graphic symbol
BLF7G24L-160P (SOT539A)
1
2
5
3
3
4
4
5
1
2
sym117
BLF7G24LS-160P (SOT539B)
1
2
3
4
5
drain1
drain2
gate1
gate2
source
[1]
1
2
5
3
1
3
4
5
4
2
sym117
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name Description
BLF7G24L-160P
BLF7G24LS-160P
-
-
flanged balanced ceramic package; 2 mounting holes;
4 leads
earless flanged balanced ceramic package; 4 leads
Version
SOT539A
SOT539B
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
65
-
Max
65
+13
+150
200
Unit
V
V
C
C
BLF7G24L-160P_7G24LS-160P#6
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 1 September 2015
2 of 14
BLF7G24L-160P; BLF7G24LS-160P
Power LDMOS transistor
5. Thermal characteristics
Table 5.
Symbol
R
th(j-c)
Thermal characteristics
Parameter
thermal resistance from junction to case
Conditions
T
case
= 80
C;
P
L
= 30 W;
V
DS
= 28 V; I
Dq
= 1200 mA
Typ
0.2
Unit
K/W
6. Characteristics
Table 6.
Characteristics
T
j
= 25
C per section, unless otherwise specified.
Symbol Parameter
V
GS(th)
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
Conditions
V
DS
= 10 V; I
D
= 102 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 3.57 A
Min
65
1.5
-
-
-
-
-
Typ
-
1.9
-
19
-
6.9
0.15
Max Unit
-
2.3
2.8
-
280
-
V
V
A
A
nA
S
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 1 mA
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 3.57 A
0.23
7. Test information
Remark:
All testing performed in a class-AB production test circuit.
Table 7.
Functional test information
Test signal: single carrier IS-95 with pilot, paging, sync and 6 traffic channels (Walsh codes 8 - 13).
PAR = 9.7 dB at 0.01 % probability on the CCDF, channel bandwidth is 1.2288 MHz; f
1
= 2300 MHz;
f
2
= 2400 MHz; RF performance at V
DS
= 28 V; I
Dq
= 1200 mA; T
case
= 25
C; unless otherwise
specified.
Symbol
G
p
RL
in
D
Parameter
power gain
input return loss
drain efficiency
Conditions
P
L(AV)
= 30 W
P
L(AV)
= 30 W
P
L(AV)
= 30 W
P
L(AV)
= 30 W
Min
-
25
-
Typ
Max
-
-
Unit
dB
dB
%
17.8 18.5
27.5
13.5 9
ACPR
885k
adjacent channel power ratio (885 kHz)
45.5 41.5
dBc
7.1 Ruggedness in class-AB operation
The BLF7G24L-160P and BLF7G24LS-160P are capable of withstanding a load
mismatch corresponding to VSWR = 10 : 1 through all phases under the following
conditions: V
DS
= 28 V; I
Dq
= 1200 mA; P
L
= 160 W; f = 2300 MHz.
BLF7G24L-160P_7G24LS-160P#6
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 1 September 2015
3 of 14
BLF7G24L-160P; BLF7G24LS-160P
Power LDMOS transistor
7.2 Impedance information
Table 8.
Typical impedance
Measured load-pull data. Typical values per section.
I
Dq
= 600 mA; main transistor V
DS
= 28 V. Z
S
and Z
L
defined in
Figure 1.
f
(MHz)
2300
2400
Z
S
()
2.5
j5.9
4.6
j7.2
Z
L
()
3.1
j4.3
2.9
j4.2
drain
Z
L
gate
Z
S
001aaf059
Fig 1.
Definition of transistor impedance
7.3 Graphs
7.3.1 Pulsed CW
aaa-002659
aaa-002660
20
G
p
(dB)
19
(3)
(1)
(2)
(5)
(4)
(6)
60
η
D
(%)
50
G
p
(dB)
20
60
η
D
(%)
19
50
18
40
18
(3)
(1)
(2)
(5)
(4)
(6)
40
17
30
17
30
16
20
16
20
15
10
15
10
14
42
44
46
48
50
52
P
L
(dBm)
54
0
14
0
40
80
120
160
P
L
(W)
0
200
V
DS
= 28 V; I
Dq
= 1200 mA;
= 10 %; t
p
= 0.10 ms.
(1) G
p
at f = 2300 MHz
(2) G
p
at f = 2350 MHz
(3) G
p
at f = 2400 MHz
(4)
D
at f = 2300 MHz
(5)
D
at f = 2350 MHz
(6)
D
at f = 2400 MHz
V
DS
= 28 V; I
Dq
= 1200 mA;
= 10 %; t
p
= 0.10 ms.
(1) G
p
at f = 2300 MHz
(2) G
p
at f = 2350 MHz
(3) G
p
at f = 2400 MHz
(4)
D
at f = 2300 MHz
(5)
D
at f = 2350 MHz
(6)
D
at f = 2400 MHz
Fig 2.
Power gain and drain efficiency of pulsed CW
as function of output power; typical values
Fig 3.
Power gain and drain efficiency of pulsed CW
as function of output power; typical values
BLF7G24L-160P_7G24LS-160P#6
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 1 September 2015
4 of 14
BLF7G24L-160P; BLF7G24LS-160P
Power LDMOS transistor
-8
RL
in
(dB)
-12
(1)
(2)
(3)
aaa-002661
-16
-20
-24
42
44
46
48
50
52
P
L
(dBm)
54
V
DS
= 28 V; I
Dq
= 1200 mA;
= 10 %; t
p
= 0.10 ms.
(1) f = 2300 MHz
(2) f = 2350 MHz
(3) f = 2400 MHz
Fig 4.
Input return loss of pulsed CW as a function of output power; typical values
7.3.2 IS-95
aaa-002662
(3)
(1)
(2)
(5)
(4)
(6)
aaa-002663
22
G
p
(dB)
20
60
η
D
(%)
50
G
p
(dB)
22
60
η
D
(%)
20
50
18
40
18
(3)
(1)
(2)
(4)
(5)
(6)
40
16
30
16
30
14
20
14
20
12
10
12
10
10
42
44
46
48
50
P
L
(dBm)
52
0
10
0
20
40
60
80
100
P
L
(W)
0
120
V
DS
= 28 V; I
Dq
= 1200 mA.
(1) G
p
at f = 2300 MHz
(2) G
p
at f = 2350 MHz
(3) G
p
at f = 2400 MHz
(4)
D
at f = 2300 MHz
(5)
D
at f = 2350 MHz
(6)
D
at f = 2400 MHz
V
DS
= 28 V; I
Dq
= 1200 mA.
(1) G
p
at f = 2300 MHz
(2) G
p
at f = 2350 MHz
(3) G
p
at f = 2400 MHz
(4)
D
at f = 2300 MHz
(5)
D
at f = 2350 MHz
(6)
D
at f = 2400 MHz
Fig 5.
Power gain and drain efficiency of IS-95 as
function of output power; typical values
Fig 6.
Power gain and drain efficiency of IS-95 as
function of output power; typical values
© Ampleon The Netherlands B.V. 2015. All rights reserved.
BLF7G24L-160P_7G24LS-160P#6
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 6 — 1 September 2015
5 of 14
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