CS51411, CS51412,
CS51413, CS51414
1.5 A, 260 kHz and
520 kHz, Low Voltage Buck
Regulators with External
Bias or Synchronization
Capability
The CS5141X products are 1.5 A buck regulator ICs. These devices
are fixed–frequency operating at 260 kHz and 520 kHz. The regulators
use the V
2
control architecture to provide unmatched transient
response, the best overall regulation and the simplest loop
compensation for today’s high–speed logic. These products
accommodate input voltages from 4.5 V to 40 V.
The CS51411 and CS51413 contain synchronization circuitry. The
CS51412 and CS51414 have the option of powering the controller
from an external 3.3 V to 6.0 V supply in order to improve efficiency,
especially in high input voltage, light load conditions.
The on–chip NPN transistor is capable of providing a minimum of
1.5 A of output current, and is biased by an external “boost” capacitor
to ensure saturation, thus minimizing on–chip power dissipation.
Protection circuitry includes thermal shutdown, cycle–by–cycle
current limiting and frequency foldback. The CS51411 and CS51413
are functionally pin–compatible with the LT1375. The CS51412 and
CS51414 are functionally pin–compatible with the LT1376.
Features
•
V
2
Architecture Provides Ultra–Fast Transient Response, Improved
Regulation and Simplified Design
•
2.0% Error Amp Reference Voltage Tolerance
•
Switch Frequency Decrease of 4:1 in Short Circuit Conditions
Reduces Short Circuit Power Dissipation
•
BOOST Lead Allows “Bootstrapped” Operation to Maximize
Efficiency
•
Sync Function for Parallel Supply Operation or Noise Minimization
•
Shutdown Lead Provides Power–Down Option
•
85
µA
Quiescent Current During Power–Down
•
Thermal Shutdown
•
Soft Start
•
Pin–Compatible with LT1375 and LT1376
8
1
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SO–8
D SUFFIX
CASE 751
MARKING DIAGRAM
8
5141X
ALYWT
1
X
A
WL, L
YY, Y
WW, W
T
= 1, 2, 3 or 4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Temperature Range, E or G
PIN CONNECTIONS
CS51411/3
BOOST
V
IN
V
SW
SHDNB
1
8
V
C
V
FB
GND
SYNC
CS51412/4
BOOST
V
IN
V
SW
BIAS
1
8
V
C
V
FB
GND
SHDNB
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
Semiconductor Components Industries, LLC, 2002
1
September, 2002 – Rev. 11
Publication Order Number:
CS51411/D
CS51411, CS51412, CS51413, CS51414
PRODUCT SELECTION GUIDE
Part Number
CS51411E
CS51411G
CS51412E
CS51412G
CS51413E
CS51413G
CS51414E
CS51414G
Frequency
260 kHz
260 kHz
260 kHz
260 kHz
520 kHz
520 kHz
520 kHz
520 kHz
Temperature Range
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
D1
C1
0.1
µF
V
SW
3
L1
15
µH
D3
1N5821
3.3 V
R1
205
1N4148
Bias/Sync
Sync
Sync
Bias
Bias
Sync
Sync
Bias
Bias
4.5 V – 16 V
C2
100
µF
Shutdown
SYNC
4
5
SYNC
V
C
8
C4
0.1
µF
U1 2
V
IN
SHDNB
1
BOOST
CS51411/3
GND
6
V
FB
7
C3
100
µF
R2
127
Figure 1. Application Diagram, 4.5 V – 16 V to 3.3 V @ 1.0 A Converter
MAXIMUM RATINGS*
Rating
Operating Junction Temperature Range, T
J
Lead Temperature Soldering:
Storage Temperature Range, T
S
ESD Damage Threshold (Human Body Model)
1. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
Reflow: (SMD styles only) (Note 1)
Value
–40 to 150
230 peak
–65 to +150
2.0
Unit
°C
°C
°C
kV
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2
CS51411, CS51412, CS51413, CS51414
MAXIMUM RATINGS
Pin Name
V
IN
BOOST
V
SW
V
C
SHDNB
SYNC
BIAS
V
FB
GND
V
Max
40 V
40 V
40 V
7.0 V
7.0 V
7.0 V
7.0 V
7.0 V
7.0 V
V
MIN
–0.3 V
–0.3 V
–0.6 V/–1.0 V, t < 50 ns
–0.3 V
–0.3 V
–0.3 V
–0.3 V
–0.3 V
–0.3 V
I
SOURCE
N/A
N/A
4.0 A
1.0 mA
1.0 mA
1.0 mA
1.0 mA
1.0 mA
50 mA
I
SINK
4.0 A
100 mA
10 mA
1.0 mA
1.0 mA
1.0 mA
50 mA
1.0 mA
1.0 mA
ELECTRICAL CHARACTERISTICS
(–40°C < T
J
< 125°C (CS51411E/2E/3E/4E); –40°C < T
A
< 85°C (CS51411E/2E/3E/4E);
0°C < T
A
< 70°C (CS51411G/2G/3G/4G), 4.5 V< V
IN
< 40 V; unless otherwise specified.)
Characteristic
Oscillator
Operating Frequency
Operating Frequency
Frequency Line Regulation
Maximum Duty Cycle
V
FB
Frequency Foldback Threshold
PWM Comparator
Slope Compensation Voltage
Minimum Output Pulse Width
Power Switch
Current Limit
Foldback Current
Saturation Voltage
Current Limit Delay
Error Amplifier
Internal Reference Voltage
Reference PSRR
FB Input Bias Current
Output Source Current
Output Sink Current
Output High Voltage
Output Low Voltage
Unity Gain Bandwidth
Open Loop Amplifier Gain
Amplifier Transconductance
Note 2
–
V
C
= 1.270 V, V
FB
= 1.0 V
V
C
= 1.270 V, V
FB
= 2.0 V
V
FB
= 1.0 V
V
FB
= 2.0 V
Note 2
Note 2
Note 2
–
1.244
–
–
15
15
1.39
5.0
–
–
–
1.270
40
0.02
25
25
1.46
20
500
70
6.4
1.296
–
0.1
35
35
1.53
60
–
–
–
V
dB
µA
µA
µA
V
mV
kHz
dB
mA/V
V
FB
> 0.36 V
V
FB
< 0.29 V
I
OUT
= 1.5 A, V
BOOST
= V
IN
+ 2.5 V
Note 2
1.6
0.9
0.4
–
2.3
1.5
0.7
120
3.0
2.1
1.0
160
A
A
V
ns
CS51411/CS51412, Fix V
FB,
∆V
C
/∆T
ON
CS51413/CS51414
CS51411/CS51412, V
FB
to V
SW
CS51413/CS51414, V
FB
to V
SW
8.0
25
–
–
17
50
150
–
26
75
300
230
mV/µs
mV/µs
ns
ns
CS51411/CS51412
CS51413/CS51414
–
–
–
224
446
–
85
0.29
260
520
0.05
90
0.32
296
594
0.15
95
0.36
kHz
kHz
%/V
%
V
Test Conditions
Min
Typ
Max
Unit
2. Guaranteed by design, not 100% tested in production.
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3
CS51411, CS51412, CS51413, CS51414
ELECTRICAL CHARACTERISTICS (continued)
(–40°C < T
J
< 125°C (CS51411E/2E/3E/4E); –40°C < T
A
< 85°C (CS51411E/2E/3E/4E);
0°C < T
A
< 70°C (CS51411G/2G/3G/4G), 4.5 V< V
IN
< 40 V; unless otherwise specified.)
Characteristic
Sync
Sync Frequency Range
Sync Frequency Range
Sync Pin Bias Current
Sync Threshold Voltage
Shutdown
Shutdown Threshold Voltage
Shutdown Pin Bias Current
Thermal Shutdown
Overtemperature Trip Point
Thermal Shutdown Hysteresis
General
Quiescent Current
Shutdown Quiescent Current
Boost Operating Current
Minimum Boost Voltage
Start up Voltage
Minimum Output Current
3. Guaranteed by design, not 100% tested in production.
I
SW
= 0 A
V
SHDNB
= 0 V
V
BOOST
– V
SW
= 2.5 V
Note 3
–
–
3.0
8.0
6.0
–
2.2
–
4.0
20
15
–
3.3
7.0
6.25
85
40
2.5
4.4
12
mA
µA
mA/A
V
V
mA
Note 3
Note 3
175
–
185
42
195
–
°C
°C
V
SHDNB
= 0 V
–
1.0
0.14
1.3
5.00
1.6
35
V
µA
CS51411/CS51412
CS51413/CS51414
V
SYNC
= 0 V
V
SYNC
= 5.0 V
–
305
575
–
250
1.0
–
–
0.1
360
1.5
470
880
0.2
460
1.9
kHz
kHz
µA
µA
V
Test Conditions
Min
Typ
Max
Unit
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
1
2
3
PIN SYMBOL
BOOST
V
IN
V
SW
FUNCTION
The BOOST pin provides additional drive voltage to the on–chip NPN power transistor.
The resulting decrease in switch on voltage increases efficiency.
This pin is the main power input to the IC.
This is the connection to the emitter of the on–chip NPN power transistor and serves
as the switch output to the inductor. This pin may be subjected to negative voltages
during switch off–time. A catch diode is required to clamp the pin voltage in normal
operation. This node can stand –1.0 V for less than 50 ns during switch node flyback.
The BIAS pin connects to the on–chip power rail and allows the IC to run most of its
internal circuitry from the regulated output or another low voltage supply to improve
efficiency. The BIAS pin is left floating if this feature is not used.
This pin provides the synchronization input.
The shutdown pin is active low and TTL compatible. The IC goes into sleep mode,
drawing less than 85
µA
when the pin voltage is pulled below 1.0 V. This pin should be
left floating in normal position.
Power return connection for the IC.
The FB pin provides input to the inverting input of the error amplifier. If V
FB
is lower
than 0.29 V, the oscillator frequency is divided by four, and current limit folds back to
about 1 ampere. These features protect the IC under severe overcurrent or short
circuit conditions.
The V
C
pin provides a connection point to the output of the error amplifier and input to
the PWM comparator. Driving of this pin should be avoided because on–chip test
circuitry becomes active whenever current exceeding 0.5 mA is forced into the IC.
4 (CS51412/CS51414)
BIAS
5 (CS51411/CS51413)
5 (CS51412/CS51414)
4 (CS51411/CS51413)
6
7
SYNC
SHDNB
GND
V
FB
8
V
C
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4
CS51411, CS51412, CS51413, CS51414
SHDNB
SYNC
V
IN
5.0
µA
2.9 V LDO
Voltage
Regulator
Shutdown
Comparator
+
–
+
1.3 V –
S
R
Q
BIAS
Artificial
Ramp
Oscillator
Thermal
Shutdown
BOOST
Output
Driver
V
SW
∑
+
–
PWM
Comparator
Current
Limit
Comparator
I
REF
+
–
V
FB
–
+
1.270 V
+
–
Error
Amplifier
+
0.32 V –
+
Frequency
and Current
Limit Foldback
I
FOLDBACK
GND
–
V
C
1.46 V
Figure 2. Block Diagram
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