54122-109-43-1150R datasheet, PDF

54122-109-43-1150R: DescriptionBoard Connector, 86 Contact(s), 2 Row(s), Male, Straight, 0.1 inch Pitch, Solder Kinked Leads Terminal, Locking, Black Insulator, Receptacle,; CategoryThe connector The connector; File Size107KB，1 Pages; ManufacturerAmphenol; Websitehttp://www.amphenol.com/

Download Datasheet Parametric View All

54122-109-43-1150R Overview

Board Connector, 86 Contact(s), 2 Row(s), Male, Straight, 0.1 inch Pitch, Solder Kinked Leads Terminal, Locking, Black Insulator, Receptacle,

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Reach Compliance Code	compliant
ECCN code	EAR99
body width	0.19 inch
subject depth	0.453 inch
body length	4.3 inch
Body/casing type	RECEPTACLE
Connector type	BOARD CONNECTOR
Contact to complete cooperation	AU ON NI
Contact completed and terminated	Tin/Lead (Sn/Pb) - with Nickel (Ni) barrier
Contact point gender	MALE
Contact material	PHOSPHOR BRONZE
contact mode	RECTANGULAR
Contact style	SQ PIN-SKT
Insulation resistance	5000000000 Ω
Insulator color	BLACK
insulator material	THERMOPLASTIC
JESD-609 code	e0
Manufacturer's serial number	54122
Plug contact pitch	0.1 inch
Match contact row spacing	0.1 inch
Installation option 1	LOCKING
Installation method	STRAIGHT
Installation type	BOARD
Number of connectors	ONE
PCB row number	2
Number of rows loaded	2
Maximum operating temperature	125 °C
Minimum operating temperature	-65 °C
PCB contact pattern	RECTANGULAR
PCB contact row spacing	2.54 mm
Plating thickness	30u inch
Rated current (signal)	3 A
Guideline	UL, CSA
reliability	COMMERCIAL
Terminal length	0.12 inch
Terminal pitch	2.54 mm
Termination type	SOLDER KINKED LEADS
Total number of contacts	86

PDM: Rev:K

STATUS:

Released

Printed: Mar 10, 2011

Several classic FPGA verification books: SystemVerilog is a hardware description and verification language (HDVL). It is based on the IEEE1364-2001 Verilog hardware description language (HDL) and has been extended to include C language data ...; arui1999 Download Centre

One of the CPLD pins does not work: After the program is successfully burned, the trigger pin of the CPLD is always in a high-impedance state. The entire circuit is triggered as soon as it is powered on. I want to know whether it is a p...; xiaxuedehai FPGA/CPLD

Recommended: ARM/Linux/WinCE Lecture (Shanghai): On July 21, it was held in the multifunctional conference room on the 6th floor of Building 1 of Shanghai University of Urban Management (50 meters straight after entering the door). Three topics: The...; chenye171 Linux and Android

Problems encountered when downloading DSP28335 with C2Prog: As the title says, please enlighten me :Cry:...; TLZme Microcontroller MCU

Embedded C language programming specification: [size=3][font=宋体]C language is the main tool for developing embedded applications, but C language is not specially designed for embedded systems. Many embedded systems have more stringent requirements...; zjw50001 Programming Basics

Purgatory Legend-task_function battle: 1. The difference between task and function There are four main differences between task and function: l Function can only share one simulation time unit with the main module, while task defines its o...; 梦翼师兄 FPGA/CPLD

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components