DS3100DK datasheet, PDF - EEWORLD Datasheet

DS3100DK: DescriptionStratum 3/E3 Timing Card IC Demo Kit; File Size6MB，38 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

Download Datasheet View All

DS3100DK Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	DS3100DK	-	-	View	Buy Now

DS3100DK Overview

Stratum 3/E3 Timing Card IC Demo Kit

Preview

Download Datasheet

View All

DS3100DK

Stratum 3/3E Timing Card IC

Demo Kit

www.maxim-ic.com

GENERAL DESCRIPTION

The DS3100DK is an easy-to-use demo and

evaluation kit for the DS3100 Stratum 3/3E timing

card IC. A surface-mounted DS3100 and careful

layout provide maximum signal integrity. An on-board

Maxim 8051-compatible microcontroller and included

software give point-and-click access to configuration

and status registers from a personal computer. LEDs

on the board indicate interrupt, power-supply

function, and GPIO status. The board provides BNC

and bantam connectors for the composite clock and

BITS interfaces. Single-ended and LVDS clocks are

accessed via SMB connectors. All LEDs and

connectors are clearly labeled with silkscreening to

identify associated signals.

FEATURES

Soldered DS3100 for Best Signal Integrity

SMB Connectors, BNC, Bantam,

Transformers, and Termination Ease

Connectivity

Careful Layout for Analog Signal Paths

On-Board Stratum 3 Oscillator with Footprints

for Stratum 3E Oscillators

DS3100 Configured for CPU Bus Operation

for Complete Control Over the Device

On-Board Maxim Microcontroller and

Included Software Provide Point-and-Click

Access to the DS3100 Register Set

LEDs for Interrupt, Power Supplies, and GPIO

Included International Power Supply

Banana Jack VDD and GND Connectors

Support Use of Lab Power Supplies

Easy-to-Read Silkscreen Labels Identify the

Signals Associated with All Connectors,

Jumpers, and LEDs

Header Provided for Master/Slave Connection

to a Second DS3100DK

Software Provides GUI Fields for Most

Commonly Used Features Plus Full

Read/Write Access to the Entire Register Set

Software Support for Creating and Running

Configuration Scripts Saves Time During

Evaluation

DEMO KIT CONTENTS

DS3100DK PCB

CD-ROM Includes:

DS3100 Software

DS3100 Initialization File

DS3100DK Data Sheet

DS3100 Data Sheet

DS3100 Rev A2 Errata Sheet

MINIMUM SYSTEM REQUIREMENTS

PC Running Windows® XP or Windows 2000

Display with 1024 x 768 Resolution or Higher

Available USB Port or Serial (COM) Port

USB Cable or DB-9 Serial Cable

ORDERING INFORMATION

PART

DS3100DK

DESCRIPTION

Demo kit for DS3100

For software revision 1.0.

Windows is a registered trademark of Microsoft Corp.

1 of 38

REV: 071807

DS3100DK

LIST OF FIGURES

Figure 1-1. Board Floorplan......................................................................................................................................... 4

Figure 4-1. Software Main Screen ............................................................................................................................... 8

Figure 4-2. Software Input Clock Window ................................................................................................................... 9

Figure 4-3. Software T0 DPLL Window ..................................................................................................................... 11

Figure 4-4. Software T4 DPLL Window ..................................................................................................................... 12

Figure 4-5. Software BITS Receiver Window (DS1 Mode) ....................................................................................... 16

Figure 4-6. Software BITS Receiver Window (E1 Mode) .......................................................................................... 16

Figure 4-7. Software BITS Transmitter Window (DS1 Mode and E1 Mode .............................................................. 16

Figure 4-8. Software CC Receiver Window............................................................................................................... 19

Figure 4-9. Software Register View Window ............................................................................................................. 20

LIST OF TABLES

Table 4-1. Mapping Between Input Clock Software Fields and DS3100 Register Fields ........................................... 9

Table 4-2. Mapping Between T0 DPLL Software Fields and DS3100 Register Fields ............................................. 11

Table 4-3. Mapping Between T4 DPLL Software Fields and DS3100 Register Fields ............................................. 13

Table 4-4. Mapping Between T0 APLL Software Fields and DS3100 Register Fields ............................................. 13

Table 4-5. Mapping Between T4 APLL Software Fields and DS3100 Register Fields ............................................. 13

Table 4-6. Mapping Between Output Clock Software Fields and DS3100 Register Fields ...................................... 14

Table 4-7. Mapping Between DPLL Software Fields and DS3100 Register Fields .................................................. 15

Table 4-8. Mapping Between BITS Software Fields and DS3100 Register Fields ................................................... 17

Table 4-9. Mapping Between CC Software Fields and DS3100 Register Fields ...................................................... 19

Table 4-10. Mapping Between REFCLK Software Fields and DS3100 Register Fields ........................................... 19

3 of 38

DS3100DK

1.1

Input and Output Clocks

There are 13 SMB connectors at the top of the board labeled IC1–IC4, IC7–IC14, and SYNC2K that provide a

single-ended clock input to the DS3100. All single-ended clock inputs are connected to the DS3100 with a 50Ω

characteristic impedance trace and terminated with 50Ω at the device. Four additional SMB connectors labeled

IC5P, IC5N, IC6P, and IC6N provide differential clock inputs to the DS3100. These differential inputs have 50Ω

trace impedance and 50Ω termination at the device (i.e., 100Ω differential).

On the other end of the PCB are eight SMB clock output connectors labeled OC1–OC5 and OC9, OC10, and

OC11. All single-ended clock outputs are buffered at the DS3100 and connected to the SMB connector via a 50Ω

characteristic impedance trace. Four additional SMB connectors labeled OC6P, OC6N, OC7P, and OC7N provide

connections to the differential outputs from the DS3100.

1.2

Jumpers, Headers, and Switch Settings

Jumpers JMP1 to JMP4 (upper right of board) provide input settings to the four DS3100 GPIO pins. If a jumper is

installed the corresponding GPIO input is high. With no jumper the GPIO pin defaults low. LEDs DS5–DS8 indicate

the logic level of the GPIO pins (LED lit means GPIO pin is high). Switches SW7 to SW9 set the SONSDH,

SRCSW, and MASTSLV pins, respectively, high or low as indicated by the silkscreen. Headers J1 and J2 provide

access to BITS1 and BITS2 framer signals, respectively. Header J51 provides access to the JTAG port of the

DS3100. Header J15 provides interface to a master or slave board depending on position of switch SW6.

1.3

Composite Clock Interface

Bantam jacks J89 and J90 provide access to composite clock inputs IC1A and IC2A through a 2:1 transformer.

Jumpers JMP7 and JMP6 configure termination for IC1A and IC2A, respectively. Silkscreen text indicates which

jumper is necessary to set the interface at 110Ω, 120Ω, or 133Ω. Bantam jack J117 provides an interface through a

1:1 transformer to the OC8 composite clock output. Jumpers JMP8, JMP9, and JMP10 provide different attenuation

configurations that are represented in silkscreen (Rs = 91Ω with no jumper installed). See the schematics for

additional details on the composite clock termination circuitry.

1.4

BITS Interfaces

The BITS1 DS1/E1 LIU uses bantam connectors J85 and J55 or BNC connectors J83 and J57 for transmit and

receive interfaces, respectively. The BITS2 LIU uses bantam connectors J86 and J56 or BNC connectors J84 and

J58 for transmit and receive, respectively. There is a dual transformer package for each BITS transceiver

(component T1 for BITS1 and T2 for BITS2). See the schematics for additional details on the BITS termination

circuitry.

1.5

Microcontroller

The DS87C520 microcontroller has factory-installed firmware in on-chip nonvolatile memory. This firmware

translates memory access requests from the RS-232 serial port or USB port into register accesses on the DS3100.

When the microcontroller starts up it turns on DS16 to indicate that the controller is working correctly. A pushbutton

switch labeled RESET (SW5) at the right middle of the board resets the microcontroller as well as the DS3100.

1.6

Power-Supply Connectors

The included international power supply can be connected to jack J3 to power the board or a 5V lab power supply

can be connected across the red (J13) and black (J19) banana jacks. The 5V input is then regulated to 3.3V and

1.8V and distributed to board components.

5 of 38

Recommended Resources

Sprinkler control circuit using AC motor

6V dry battery charger circuit

Under voltage protection circuit

2～1OV precision regulated power supply circuit

Frequency converter speed regulating circuit with main speed setting box and linkage setting operating box

Flashlight control model motor circuit

The initial functions of the EZ430-Chronos wireless fishing sports watch I modified have been realized as planned.: Originally, the data transmission function test with the computer had been successful many days ago, but the specific interface was not completed. However, two or three days ago, due to a detail probl...; wangfuchong Microcontroller MCU

Lattice management distribution problem: I use lattice's ECP3 95E, which is a FBGA672 package. The design has a ddr2 sdram controller. The lattice datasheet says that for signals such as DQS , dedicated pins must be used, and they are usuall...; eeleader FPGA/CPLD

Does anyone have the antenna test program for 2530?: The board has been made for a long time, but I can't find the open line test program for 2530 under IAR760. There is no such program in the 07 protocol stack. If anyone can give me a copy, I will be v...; panxm916 RF/Wirelessly

Pulse fast charging design for lead-acid batteries in electric vehicles: Abstract: The principle of fast charging is explained. In view of various problems that occur during battery charging, a pulse fast charging scheme with graded constant current is adopted, and the des...; hero Power technology

Where can I get the 430f47187 header file?: I would like to ask you guys, where can I get the 430f47187 header file?...; wlli Microcontroller MCU

430F5529 output PWM is faulty: #includeint main(void) {WDTCTL = WDTPW + WDTHOLD;// Stop WDTP2DIR |= 0x0C;// P2.2 and P2.3 outputP2SEL |= 0x0C;// P2.2 and P2.3 options selectTA1CCR0 = 128;// PWM Period/2TA1CCTL1 = OUTMOD_6;// CCR1 t...; 想做李白 Microcontroller MCU

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components