FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-29118-2E
Spread Spectrum Clock Generator
MB88153
■
DESCRIPTION
MB88153 is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary (EMI)
can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator.
It corresponds to both of the center spread which modulates input frequency as Middle Centered and down spread
which modulates so as not to exceed input frequency.
■
FEATURE
•
•
•
•
•
•
•
•
•
•
Power down pin : 600
µA
(Max) consumption current at power down
Input frequency : 16.6 MHz to 134 MHz
Output frequency : 16.6 MHz to 134 MHz (One-fold input frequency)
Modulation rate can select from
±
0.5%,
±
1.5%
−
1.0% or
−
3.0%. (For center spread / down spread.)
Modulation clock output Duty : 40% to 60%
Modulation clock Cycle-Cycle Jitter : Less than 100 ps
Low current consumption by CMOS process : 4.0 mA (24 MHz : Typ-sample, no load)
Power supply voltage : 3.3 V
±
0.3 V
Operating temperature :
−
40
°C
to
+85 °C
Package : SOP 8-pin
■
PACKAGE
8-pin plastic SOP
(FPT-8P-M02)
MB88153
■
PRODUCT LINEUP
MB88153 has four kinds of modulation rate and modulation type (center/down spread).
Product
Modulation rate
Modulation type
MB88153-100
MB88153-101
MB88153-110
MB88153-111
−1.0%
−3.0%
±0.5%
±1.5%
Down
Center
■
PIN ASSIGNMENT
TOP VIEW
CKIN 1
V
DD
2
V
SS
3
CKOUT 4
8 XPD
MB88153
7 FREQ0
6 FREQ1
5 ENS
FPT-8P-M02
■
PIN DESCRIPTION
Pin name
CKIN
V
DD
V
SS
CKOUT
ENS
FREQ1
FREQ0
XPD
I/O
I
⎯
⎯
O
I
I
I
I
Pin no.
1
2
3
4
5
6
7
8
Clock input pin
Power supply voltage pin
GND pin
Modulated clock output pin
“L” output at power down
Modulation enable setting pin
Frequency setting pin
Frequency setting pin (with pull-up resistor)
Power down pin (with pull-up resistor)
Power down at “L” input
Description
2
MB88153
■
I/O CIRCUIT TYPE
Pin
Circuit type
Remarks
• CMOS hysteresis input
CKIN,
ENS,
FREQ1
• CMOS hysteresis input with pull-up
resistor 50 kΩ (typ)
50 kΩ
FREQ0,
XPD
• CMOS output
• “L” output at power down
CKOUT
3
MB88153
■
HANDLING DEVICES
Preventing Latchup
A latchup can occur if, on this device, (a) a voltage higher than V
DD
or a voltage lower than V
SS
is applied to an
input or output pin or (b) a voltage higher than the rating is applied between V
DD
and V
SS
. The latchup, if it occurs,
significantly increases the power supply current and may cause thermal destruction of an element. When you
use this device, be very careful not to exceed the maximum rating.
Handling unused pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or
pull-down resistor.
Unused output pin should be opened.
Power supply pins
Please design connecting the power supply pin of this device by as low impedance as possible from the current
supply source.
We recommend connecting electrolytic capacitor (about 10
µF)
and the ceramic capacitor (about 0.01
µF)
in
parallel between V
SS
and V
DD
near the device, as a bypass capacitor.
Clock I/O circuit
Noise near the CKIN pin may cause the device to malfunction. Design the printed circuit board so that the wiring
for the clock input does not intersect any other wiring.
Please pay attention so that an overshoot and an undershoot do not occur to an input clock of CKIN pin.
Design the printed circuit board that surrounds the CKIN and CKOUT pins with ground.
4
MB88153
■
BLOCK DIAGRAM
V
DD
XPD
Power down
setting
Frequency setting
Frequency setting
Modulation enable
setting
Reference clock
PLL block
Clock output
CKOUT
FREQ0
FREQ1
ENS
CKIN
V
SS
1
−
M
Phase
compare
Charge
pump
V/I
conversion
Frequency setting
IDAC
ICO
Reference
clock
1
−
N
Modulation
clock output
Loop filter
Modulation rate
setting
Modulation enable
setting
1
−
L
Modulation logic
MB88153 PLL block
A glitchless IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing
EMI.
5
京公网安备 11010802033920号
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