DS1921L-F5X
Thermochron iButton
www.maxim-ic.com
SPECIAL FEATURES*
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Digital thermometer measures temperature in
0.5°C increments (accuracy ±1.0°C)
Built-in real-time clock (RTC) and timer has
accuracy of
±2
minutes per month from 0°C
to 45°C
Automatically wakes up and measures tem-
perature at user-programmable intervals from
1 to 255 minutes
Logs up to 2048 consecutive temperature
measurements in protected nonvolatile (NV)
memory
Records a long-term temperature histogram
with 2.0°C resolution
Programmable temperature-high and tem-
perature-low alarm trip points
Records up to 24 time stamps and durations
when temperature leaves the range specified
by the trip points
512 bytes of general-purpose read/write NV
memory
Typical lifetime more than 9 years
Communicates to host with a single digital
signal at 14.1kbits or 125kbits per second
using 1-Wire
®
protocol
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Durable stainless steel case engraved with
registration number withstands harsh envi-
ronments
Easily affixed with self-stick adhesive back-
ing, latched by its flange, or locked with a
ring pressed onto its rim
Presence detector acknowledges when reader
first applies voltage
Meets UL#913 (4th Edit.). Intrinsically Safe
Apparatus: approved under Entity Concept
for use in Class I, Division 1, Group A, B, C
and D Locations (application pending)
F5 MICROCAN
5.89
0.36
0.51
© 1993
16.25
RR
YYWW REGISTERED
xx
21
17.35
15C000FBC52B
IO
GND
All dimensions are shown in millimeters.
COMMON iButton FEATURES
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Digital identification and information by
momentary contact
Unique, factory-lasered and tested 64-bit reg-
istration number (8-bit family code + 48-bit
serial number + 8-bit CRC tester) assures ab-
solute traceability because no two parts are
alike
Multidrop controller for 1-Wire net
Chip-based data carrier compactly stores
information
Data can be accessed while affixed to object
Button shape is self-aligning with cup-shaped
probes
ORDERING INFORMATION
DS1921L-F51
DS1921L-F52
DS1921L-F53
DS1921L-F50
-10°C to +85°C
-20°C to +85°C
-30°C to +85°C
-40°C to +85°C
F5 iButton
®
F5 iButton
F5 iButton
F5 iButton
EXAMPLES OF ACCESSORIES
DS9096P
DS9101
DS9093RA
DS9093A
DS9092
Self-Stick Adhesive Pad
Multi-Purpose Clip
Mounting Lock Ring
Snap-In Fob
iButton Probe
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1-Wire, Microcan, and iButton are registered trademarks of Dallas Semiconductor
*See ELECTRICAL CHARACTERISTICS table for details.
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121003
DS1921L
iButton DESCRIPTION
The DS1921L Thermochron iButtons are rugged, self-sufficient systems that measure temperature and
record the result in a protected memory section. The recording is done at a user-defined rate, both as a
direct storage of temperature values as well as in the form of a histogram. Up to 2048 temperature values
taken at equidistant intervals ranging from 1 to 255 minutes can be stored. The histogram provides 63
data bins for a resolution of 2.0°C. If the temperature leaves a user-programmable range, the DS1921L
will also record when this happened, for how long the temperature stayed outside the permitted range,
and if the temperature was too high or too low. An additional 512 bytes of read/write NV memory allow
storing information pertaining to the object to which the DS1921L is associated. Data is transferred
serially via the 1-Wire protocol, which requires only a single data lead and a ground return. Every
DS1921L is factory-lasered with a guaranteed unique 64-bit registration number that allows for absolute
traceability. The durable stainless steel package is highly resistant to environmental hazards such as dirt,
moisture, and shock. Accessories permit the DS1921L to be mounted on almost any object, including
containers, pallets, and bags.
APPLICATION
The DS1921L Thermochron iButton is an ideal device to monitor the temperature of any object it is
attached to or shipped with, such as perishable goods or containers of temperature sensitive chemicals.
Using TMEX, the read/write NV memory can store an electronic copy of shipping information, date of
manufacture and other important data written as clear as well as encrypted files.
OVERVIEW
The block diagram in Figure 1 shows the relationships between the major control and memory sections of
the DS1921L. The device has seven main data components: 1) 64-bit lasered ROM, 2) 256-bit scratch-
pad, 3) 4096-bit general-purpose SRAM, 4) 256-bit register page of timekeeping, control, and counter
registers, 5) 96 bytes of alarm time stamp and duration logging memory, 6) 126 bytes of histogram mem-
ory, and 7) 2048 bytes of data-logging memory. Except for the ROM and the scratchpad, all other mem-
ory is arranged in a single linear address space. All memory reserved for logging purposes, counter reg-
isters and several other registers are read-only for the user. The timekeeping and control registers are
write-protected while the device is programmed for a mission.
The hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus master must first provide
one of the seven ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Condi-
tional Search ROM, 5) Skip ROM, 6) Overdrive-Skip ROM or 7) Overdrive-Match ROM. Upon comple-
tion of an Overdrive ROM command byte executed at standard speed, the device will enter Overdrive
mode, where all subsequent communication occurs at a higher speed. The protocol required for these
ROM function commands is described in Figure 12. After a ROM function command is successfully exe-
cuted, the memory functions become accessible and the master may provide any one of the seven avail-
able commands. The protocol for these memory function commands is described in Figure 10.
All data is
read and written least significant bit first.
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DS1921L
DS1921L BLOCK DIAGRAM
Figure 1
1-Wire
Port
IO
ROM
Function
Control
64-Bit
Lasered
ROM
Parasite
Powered
Circuitry
Memory
Function
Control
256-Bit
Scratchpad
General-Purpose
SRAM
32.768kHz
Oscillator
Internal
Timekeeping &
Control Reg. &
Counters
Register Page
Alarm Time Stamp
and Duration
Logging Memory
Temperature
Sensor
Control
Logic
Histogram Memory
3V Lithium
Datalog
Memory
PARASITE POWER
The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry “steals” power when-
ever the IO input is high. IO will provide sufficient power as long as the specified timing and voltage re-
quirements are met. The advantages of parasite power are two-fold: 1) by parasiting off this input, lithium
is conserved, and 2) if the lithium is exhausted for any reason, the ROM may still be read normally.
64-BIT LASERED ROM
Each DS1921L contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family
code. The next 36 bits are a unique serial number. The next 12 bits, called temperature range code, allow
distinguishing the various DS1921L-F5 versions from each other and from the DS1921H and DS1921Z.
The last eight bits are a CRC of the first 56 bits. See Figure 3 for details. The 1-Wire CRC is generated
using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4. The
polynomial is X
8
+ X
5
+ X
4
+ 1. Additional information about the Dallas 1-Wire Cyclic Redundancy
Check is available in
Application Note 27
and in the
Book of DS19xx iButton Standards.
The shift register bits are initialized to 0. Then starting with the least significant bit of the family code,
one bit at a time is shifted in. After the eighth bit of the family code has been entered, then the serial
number followed by the temperature range code is entered. After the range code has been entered, the
shift register contains the CRC value. Shifting in the eight bits of CRC returns the shift register to all 0s.
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DS1921L
HIERARCHICAL STRUCTURE FOR 1-Wire PROTOCOL
Figure 2
BUS
Master
1-Wire net
Other
Devices
DS1921
Command
Level:
Available
Commands:
Read ROM
Match ROM
Search ROM
Skip ROM
Overdrive Skip
Overdrive Match
Conditional Search
ROM
Write Scratchpad
Read Scratchpad
Copy Scratchpad
Read Memory
Read Memory w/CRC
Clear Memory
Cmd. Data Field
Codes: Affected:
33h
55h
F0h
CCh
3Ch
69h
ECh
64-bit Reg. #
64-bit Reg. #
64-bit Reg. #
N/A
OD-Flag
64-bit Reg. #, OD-Flag
64-bit Reg. #, Cond. Search settings,
device status
256-bit scratchpad, flags
256-bit scratchpad
4096-bit SRAM, registers, flags
All memory
All memory
Mission Time Stamp, Mission Samples
Counter, Start Delay, Sample
Rate, Alarm Time Stamps and
Durations, Histogram Memory
Memory address 211h
1-Wire ROM Function
Commands
DS1921-specific
Memory Function
Commands
0Fh
AAh
55h
F0h
A5h
3Ch
Convert Temperature
44h
64-BIT LASERED ROM
Figure 3
MSB
8-Bit
CRC Code
MSB
DEVICE
DS1921L-F51
DS1921L-F52
DS1921L-F53
DS1921L-F50
DS1921H-F5
DS1921Z-F5
LSB
12-Bit Temperature
Range Code
MSB
TEMP.
RANGE (°C)
-10 to +85
-20 to +85
-30 to +85
-40 to +85
+15 to +46
-5 to +26
LSB
MSB
36-Bit Serial Number
LSB
TEMP. RANGE CODE
0011
0010
0001
0000
0100
0011
0100
0101
0101
0110
1111
1011
1100
0100
1100
0100
0010
0010
LSB
8-Bit Family
Code (21h)
MSB
LSB
RESOLUTION
(°C)
0.5
0.5
0.5
0.5
0.125
0.125
HEX.
EQUIVALENT
34C
254
15C
064
4F2
3B2
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DS1921L
1-Wire CRC GENERATOR
Figure 4
Polynomial = X + X + X + 1
8
5
4
1
STAGE
st
2
STAGE
nd
3
STAGE
rd
4
STAGE
th
5
STAGE
th
6
STAGE
th
7
STAGE
th
8
STAGE
th
X
0
X
1
X
2
X
3
X
4
X
5
X
6
X
7
X
8
INPUT DATA
MEMORY
The memory map of the DS1921L is shown in Figure 5. The 4096-bit general-purpose SRAM make up
pages 0 through 15. The timekeeping, control, and counter registers fill page 16, called Register Page (see
Figure 6). Pages 17 to 19 are assigned to storing the alarm time stamps and durations. The temperature
histogram bins begin at page 64 and use up to four pages. The temperature logging memory covers pages
128 to 191. Memory pages 20 to 63, 68 to 127, and 192 to 255 are reserved for future extensions. The
scratchpad is an additional page that acts as a buffer when writing to the SRAM memory or the register
page. The memory pages 17 and higher are read-only for the user. They are written to or erased solely
under supervision of the on-chip control logic.
DS1921L MEMORY MAP
Figure 5
32-Byte Intermediate Storage Scratchpad
ADDRESS
0000h to
01FFh
0200h to
021Fh
0220h to
027Fh
0280h to
07FFh
0800h to
087Fh
0880h to
0FFFh
1000h to
17FFh
1800h to
1FFFh
General-Purpose SRAM (16 Pages)
32-Byte Register Page
Alarm Time Stamps and Durations
(Reserved for Future Extensions)
Temperature Histogram Memory
(Reserved for Future Extensions)
Datalog Memory (64 Pages)
(Reserved for Future Extensions)
Pages 0 to 15
Page 16
Pages 17 to 19
Pages 20 to 63
Pages 64 to 67
Pages 68 to 127
Pages 128 to 191
Pages 192 to 255
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