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8T49N105A-008NLGI8

Description
Clock Generators & Support Products 8T49N105I UFT
Categorysemiconductor    Analog mixed-signal IC   
File Size869KB,38 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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8T49N105A-008NLGI8 Overview

Clock Generators & Support Products 8T49N105I UFT

8T49N105A-008NLGI8 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerIDT (Integrated Device Technology, Inc.)
Product CategoryClock Generators & Support Products
RoHSDetails
PackagingReel
Factory Pack Quantity5000
FemtoClock
®
NG
Universal Frequency Translator
General Description
The IDT8T49N105I is a highly flexible FemtoClock® NG general
purpose, low phase noise Universal Frequency Translator /
Synthesizer with alarm and monitoring functions suitable for
networking and communications applications. It is able to generate
any output frequency in the 0.98MHz - 312.5MHz range and most
output frequencies in the 312.5MHz - 1,300MHz range (see Table 3
for details). A wide range of input reference clocks and a range of
low-cost fundamental mode crystal frequencies may be used as the
source for the output frequency.
The IDT8T49N105I has three operating modes to support a very
broad spectrum of applications:
1) Frequency Synthesizer
IDT8T49N105I
DATA SHEET
Features
Fourth generation FemtoClock® NG technology
Universal Frequency Translator (UFT) / Frequency Synthesizer
Single output (Q, nQ), programmable as LVPECL or LVDS
Zero ppm frequency translation
Single differential input supports the following input types:
LVPECL, LVDS, LVHSTL, HCSL
Input frequency range: 8kHz - 710MHz
Crystal input frequency range: 16MHz - 40MHz
Two factory-set register configurations for power-up default state
Synthesizes output frequencies from a 16MHz - 40MHz
fundamental mode crystal.
Fractional feedback division is used, so there are no
requirements for any specific crystal frequency to produce the
desired output frequency with a high degree of accuracy.
Applications: PCI Express, Computing, General Purpose
Translates any input clock in the 16MHz - 710MHz frequency
range into any supported output frequency.
This mode has a high PLL loop bandwidth in order to track input
reference changes, such as Spread-Spectrum Clock
modulation, so it will not attenuate much jitter on the input
reference.
Applications: Networking & Communications.
Translates any input clock in the 8kHz -710MHz frequency
range into any supported output frequency.
This mode supports PLL loop bandwidths in the 10Hz - 580Hz
range and makes use of an external crystal to provide
significant jitter attenuation.
Power-up default configuration pin or register selectable
Configurations customized via One-Time Programmable ROM
Settings may be overwritten after power-up via I
2
C
I
2
C Serial interface for register programming
2) High-Bandwidth Frequency Translator
RMS phase jitter at 155.52MHz, using a 40MHz crystal LVDS
Output (12kHz - 20MHz): 439fs (typical), Low Bandwidth Mode
(FracN)
RMS phase jitter at 400MHz, using a 40MHz crystal
(12kHz - 40MHz):285fs (typical), Synthesizer Mode (Integer FB)
Output supply voltage modes:
V
CC
/V
CCA
/V
CCO
3.3V/3.3V/3.3V
3.3V/3.3V/2.5V (LVPECL only)
2.5V/2.5V/2.5V
-40°C to 85°C ambient operating temperature
Lead-free (RoHS 6) packaging
3) Low-Bandwidth Frequency Translator
Pin Assignment
LOCK_IND
V
CC
V
CCO
V
EE
nc
nc
S_A0
S_A1
CONFIG
SCLK
SDATA
V
CC
PLL_BYPASS
nc
19
18
17
14
13
12
8
V
EE
11
9
10
nc
nc
OE
nQ
nc
7
V
CC
nc
nc
This device provides two factory-programmed default power-up
configurations burned into One-Time Programmable (OTP) memory.
The configuration to be used is selected by the CONFIG pin. The two
configurations are specified by the customer and are programmed by
IDT during the final test phase from an on-hand stock of blank
devices. The two configurations may be completely independent of
one another.
One usage example might be to install the device on a line card with
two optional daughter cards: an OC-12 option requiring a 622.08MHz
LVDS clock translated from a 19.44MHz input and a Gigabit Ethernet
option requiring a 125MHz LVPECL clock translated from the same
19.44MHz input reference.
To implement other configurations, these power-up default settings
can be overwritten after power-up using the I
2
C interface and the
device can be completely reconfigured. However, these settings
would have to be re-written next time the device powers-up.
nc
nc
LF0
LF1
V
EE
V
CCA
HOLDOVER
CLKBAD
nc
XTALBAD
30
29 28 27 26 25 24 23 22 21
20
31
32
33
34
35
37
38
39
40
1
2
3
V
CC
4
nc
5
CLK
6
nCLK
XTAL_IN
XTAL_OUT
8T49N105
40 Lead VFQFN
6mm x 6mm x 0.925mm
16
36
E-Pad 4.65mm x 4.65mm
15
K Package
Top View
IDT8T49N105ANLGI REVISION A MAY 24, 2013
1
Q
©2013 Integrated Device Technology, Inc.

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Description Clock Generators & Support Products 8T49N105I UFT Clock Generators & Support Products FemtoClock NG Uni Translator 3 Mode Clock Generators & Support Products Clock Generator Clock Generators & Support Products Clock Generator Clock Generators & Support Products FemtoClock NG Universal Frequency Translator Clock Generators & Support Products 8T49N105I UFT
Product Attribute Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value
Manufacturer IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.)
Product Category Clock Generators & Support Products Clock Generators & Support Products Clock Generators & Support Products Clock Generators & Support Products Clock Generators & Support Products Clock Generators & Support Products
RoHS Details Details Details Details Details Details
Packaging Reel Tray Tray Reel Reel Reel
Factory Pack Quantity 5000 490 490 5000 5000 5000
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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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