DATASHEET
ISL6537A
ACPI Regulator/Controller for Dual Channel DDR Memory Systems
The ISL6537A provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller to
supply V
DDQ
during S0/S1 and S3 states. During S0/S1 state,
a fully integrated sink-source regulator generates an accurate
(V
DDQ
/2) high current V
TT
voltage without the need for a
negative supply. A buffered version of the V
DDQ
/2 reference is
provided as V
REF
. A second PWM controller, which requires
external MOSFET drivers, is available for regulation of the
GMCH Core voltage. An LDO controller is also integrated for
the CPU V
TT
termination voltage regulation and the DAC.
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. The switching
regulator provides a maximum static regulation tolerance of
2% over line, load, and temperature ranges. The output is
user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the VIDPGD signal
indicates that the GMCH and CPU V
TT
termination voltage
is within spec and operational.
All outputs, except VDAC, have undervoltage protection.
The switching regulator also has overvoltage and
overcurrent protection. Thermal shutdown is integrated.
FN9143
Rev 5.00
Jul 18, 2007
Features
• Generates 5 Regulated Voltages
- Synchronous Buck PWM Controller for DDR V
DDQ
- 3A Integrated Sink/Source Linear Regulator with
Accurate VDDQ/2 Divider Reference for DDR V
TT
- PWM Regulator for GMCH Core
- LDO Regulator for CPU/GMCH V
TT
Termination
- LDO Regulator for DAC
• ACPI Compliant Sleep State Control
• Glitch-Free Transitions During State Changes
• Integrated V
REF
Buffer
• V
DDQ
PWM Controller Drives Low Cost N-Channel
MOSFETs
• 250kHz Constant Frequency Operation
- Both PWM Controllers are Phase Shifted 180°
• Tight Output Voltage Regulation
- All Outputs:
2% Over Temperature
• Fully-Adjustable Outputs with Wide Voltage Range: Down
to 0.8V Supports DDR and DDR2 Specifications
• Simple Single-Loop Voltage-Mode PWM Control Design
• Fast PWM Converter Transient Response
• Under and Overvoltage Monitoring
• OCP on the V
DDQ
Switching Regulator
Pinout
LGATE
ISL6537A (6X6 QFN)
TOP VIEW
OCSET
PHASE
UGATE
BOOT
GND
S5#
• Integrated Thermal Shutdown Protection
• Pb-Free Plus Anneal Available (RoHS Compliant)
28
5VSBY
S3#
P12V
GND
DDR_VTT
DDR_VTT
VDDQ
1
2
3
4
5
6
7
8
VDDQ
27
26
25
24
23
22
21
20
19
DRIVE3
FB3
PWM4
FB4
COMP4
COMP
FB
Applications
• Single and Dual Channel DDR Memory Power Systems in
ACPI Compliant PCs
• Graphics Cards - GPU and Memory Supplies
• ASIC Power Supplies
• Embedded Processor and I/O Supplies
• DSP Supplies
GND
29
18
17
16
15
9
DDR_VTTSNS
10
DRIVE2
11
FB2
12
VIDPGD
13
VREF_OUT
14
VREF_IN
FN9143 Rev 5.00
Jul 18, 2007
Page 1 of 16
ISL6537A
Absolute Maximum Ratings
5VSBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +7V
P12V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +14V
Absolute Boot Voltage, V
BOOT
. . . . . . . . . . . . . . . . . . . . . . . +15.0V
Upper Driver Supply Voltage, V
BOOT
- V
PHASE
. . . . . . . . 7.0V (DC)
8.0V (<10ns Pulse Width, 10J)
All other Pins . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 5VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical, Notes 1, 2)
JA
(°C/W)
JC
(°C/W)
QFN Package . . . . . . . . . . . . . . . . . . .
32
5
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage on 5VSBY . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Supply Voltage on P12V . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2.
For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
5VSBY SUPPLY CURRENT
Nominal Supply Current
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams and Typical Application Schematics
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
CC_S0
I
CC_S5
S3# and S5# HIGH, UGATE/LGATE Open
S5# LOW, S3# Don’t Care, UGATE/LGATE Open
5.5
-
7.0
700
8.0
850
mA
A
POWER-ON RESET
Rising 5VSBY POR Threshold
Falling 5VSBY POR Threshold
Rising P12V POR Threshold
Falling P12V POR Threshold
OSCILLATOR AND SOFT-START
PWM Frequency
Ramp Amplitude
Soft-Start Interval
REFERENCE VOLTAGE
Reference Voltage
System Accuracy
V
DDQ
AND V
GMCH
PWM CONTROLLER ERROR AMPLIFIERS
DC Gain
Gain-Bandwidth Product
Slew Rate
CONTROL I/O (S3#, S5#)
LOW Level Input Threshold
HIGH Level Input Threshold
0.75
-
-
-
-
2.2
V
V
GBWP
SR
(Note 3)
(Note 3)
(Note 3)
-
15
-
80
-
6
-
-
-
dB
MHz
V/s
V
REF
-
-2.0
0.800
-
-
+2.0
V
%
f
OSC
V
OSC
t
SS
220
-
6.5
250
1.5
8.2
280
-
9.5
kHz
V
ms
4.10
3.60
10.0
8.80
-
-
-
-
4.45
3.95
10.5
9.75
V
V
V
V
FN9143 Rev 5.00
Jul 18, 2007
Page 5 of 16
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