STP200NF04L
STB200NF04L - STB200NF04L-1
N-CHANNEL 40V - 3 mΩ - 120 A TO-220/D²PAK/I²PAK
STripFET™ II MOSFET
Table 1: General Features
TYPE
STB200NF04L
STP200NF04L
STB200NF04L-1
s
s
s
Figure 1: Package
R
DS(on)
3.5 mΩ
3.8 mΩ
3.8 mΩ
I
D
120 A
120 A
120 A
3
1
2
V
DSS
40 V
40 V
40 V
TYPICAL R
DS(on)
= 3
mΩ
100% AVALANCHE TESTED
LOW THERESHOLD DRIVE
3
1
TO-220
D²PAK
DESCRIPTION
This MOSFET is the latest development of STMi-
croelectronics unique “Single Feature Size™”
stripbased process. The resulting transistor shows
extremely high packing density for low on-resis-
tance, rugged avalanche characteristics and less-
critical alignement steps therefore a remarkable
manufacturing reproducibility. This new improved
device has been specifically designed for Automo-
tive applications.
APPLICATIONS
s
HIGH CURRENT, HIGH SWITCHING SPEED
3
12
I²PAK
Figure 2: Internal Schematic Diagram
Table 2: Order Codes
PART NUMBER
STP200NF04L
STB200NF04L
STB200NF04L-1
MARKING
P200NF04L
B200NF04L
B200NF04L
PACKAGE
TO-220
D²PAK
I²PAK
PACKAGING
TUBE
TAPE & REEL
TUBE
Rev. 1
April 2005
1/12
STP200NF04L - STB200NF04L - STB200NF04L-1
Table 3: Absolute Maximum ratings
Symbol
V
DS
V
GDR
V
GS
I
D
(**)
I
D
I
DM
(2)
P
TOT
dv/dt (1)
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
=20 KΩ)
Gate- source Voltage
Drain Current (continuous) at T
C
= 25°C
Drain Current (continuous) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
40
40
± 16
120
120
480
300
2
3.6
1.4
-55 to 175
Unit
V
V
V
A
A
A
W
W/°C
V/ns
J
°C
E
AS
(3)
T
stg
T
j
(1)I
SD
≤
100 A, di/dt
≤
240 A/µs, V
DD
≤
32 , T
j
≤
T
JMAX
(2) Pulse width limited by safe operating area.
(3) Starting T
j
= 25°C, I
AR
= 50A, V
DD
= 30V
(**) Current limited by Package
Table 4: Thermal Data
TO-220/I²PAK
Rthj-case
Rthj-pcb (*)
Rthja
T
l
Thermal Resistance Junction-case
Thermal Resistance Junction-pcb
Thermal Resistance Junction-ambient
Max
Max
Max
62.5
300
0.50
35
--
--
°C
D²PAK
Unit
°C/W
°C/W
Maximum Lead Temperature For Soldering Purpose
(*)When mounted on 1 inch² FR4 2oZ Cu
ELECTRICAL CHARACTERISTICS
(T
CASE
=25°C UNLESS OTHERWISE SPECIFIED)
Table 5: On/Off
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Parameter
Drain-source
Breakdown Voltage
Test Conditions
I
D
= 250 µA, V
GS
= 0
Min.
40
1
10
±100
1
TO-220
I²PAK
D²PAK
3.3
3.8
3.0
3.5
4
3.8
4.6
3.5
4.3
Typ.
Max.
Unit
V
µA
µA
nA
V
mΩ
mΩ
mΩ
mΩ
V
DS
= Max Rating
Zero Gate Voltage
Drain Current (V
GS
= 0) V
D
= Max Rating, T
C
= 125 °C
Gate-body Leakage
Current (V
DS
= 0)
Static Drain-source On
Resistance
V
GS
= ± 16V
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 250µA
V
GS
= 10 V, I
D
= 50 A
V
GS
= 5 V, I
D
= 50 A
V
GS
= 10 V, I
D
= 50 A
V
GS
= 5 V, I
D
= 50 A
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STP200NF04L - STB200NF04L - STB200NF04L-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 6: Dynamic
Symbol
g
fs
(4)
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
t
f(Voff)
t
f
t
c
Q
g
Q
gs
Q
gd
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Turn-off Delay Time
Fall Time
Cross-over Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V
DS
= 15 V
,
I
D
= 20 A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
Min.
Typ.
60
6400
1300
190
37
270
90
80
85
125
160
72
20
28.5
90
Max.
Unit
S
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
nC
nC
nC
V
DD
= 20 V, I
D
= 50 A,
R
G
= 4.7
Ω
V
GS
= 4.5 V
(see Figure 16)
V
clamp
= 32 V, I
D
= 100 A,
R
G
= 4.7
Ω
V
GS
= 4.5 V
(see Figure 17)
V
DD
=
32 V, I
D
= 100 A,
V
GS
= 4.5 V
(see Figure 19)
Table 7: Source Drain Diode
Symbol
I
SD
I
SDM
(1)
V
SD
(4)
t
rr
Q
rr
I
RRM
Parameter
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 160 A, V
GS
= 0
I
SD
= 100 A, di/dt = 100 A/µs,
V
DD
= 20 V, T
j
= 150°C
(see Figure 16)
88
240
5.5
Test Conditions
Min.
Typ.
Max.
100
400
1.3
Unit
A
A
V
ns
nC
A
(1) Pulse width limited by safe operating area
(4). Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
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STP200NF04L - STB200NF04L - STB200NF04L-1
Figure 3: Safe Operating Area
Figure 6: Thermal Impedance
Figure 4: Output Characteristics
Figure 7: Transfer Characteristics
Figure 5: Transconductance
Figure 8: Static Drain-source On Resistance
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STP200NF04L - STB200NF04L - STB200NF04L-1
Figure 9: Gate Charge vs Gate-source Voltage
Figure 12: Capacitance Variations
Figure 10: Normalized Gate Thereshold Volt-
age vs Temperature
Figure 13: Normalized On Resistance vs Tem-
perature
Figure 11: Source-Drain Diode Forward Char-
acteristics
Figure 14: Normalized Breakdown Voltage vs
Temperature
5/12
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