SN74GTLP2034GQLR datasheet, PDF

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SN74GTLP2034GQLR: DescriptionTranslation - Voltage Levels 8bit LVTTL-GTLP; Categorylogic logic; File Size349KB，19 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SN74GTLP2034GQLR Overview

Translation - Voltage Levels 8bit LVTTL-GTLP

SN74GTLP2034GQLR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	BGA
package instruction	VFBGA, BGA56,6X10,25
Contacts	56
Reach Compliance Code	_compli
Control type	INDEPENDENT CONTROL
Counting direction	BIDIRECTIONAL
series	GTLP
JESD-30 code	R-PBGA-B56
length	7 mm
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER
MaximumI(ol)	0.1 A
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	56
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	OPEN-DRAIN/3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA56,6X10,25
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Maximum supply current (ICC)	40 mA
Prop。Delay @ Nom-Su	7.1 ns
propagation delay (tpd)	8.6 ns
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.45 V
Minimum supply voltage (Vsup)	3.15 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.65 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
translate	GTLP & LVTTL
Trigger type	POSITIVE EDGE
width	4.5 mm

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Description	Translation - Voltage Levels 8bit LVTTL-GTLP	Translation - Voltage Levels 8bit LVTTL-GTLP	Translation - Voltage Levels 8bit LVTTL-GTLP	Translation - Voltage Levels 8B LVTTL-GTLP Adj- Edge-Rate Reg Trans	Translation - Voltage Levels 8B LVTTL-GTLP Adj- Edge-Rate Reg Trans	Translation - Voltage Levels 8B LVTTL GTLP Adj Edge Rate
Is it Rohs certified?	incompatible	conform to	conform to	conform to	conform to	conform to
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Parts packaging code	BGA	SOIC	TSSOP	SOIC	TSSOP	BGA
package instruction	VFBGA, BGA56,6X10,25	TSSOP, TSSOP48,.25,16	TSSOP, TSSOP48,.3,20	TSSOP, TSSOP48,.25,16	TSSOP-48	GREEN, PLASTIC, VFBGA-56
Contacts	56	48	48	48	48	56
Reach Compliance Code	_compli	unknow	unknow	unknow	unknown	unknow
Control type	INDEPENDENT CONTROL	INDEPENDENT CONTROL	INDEPENDENT CONTROL	INDEPENDENT CONTROL	INDEPENDENT CONTROL	INDEPENDENT CONTROL
Counting direction	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL
series	GTLP	GTLP	GTLP	GTLP	GTLP	GTLP
JESD-30 code	R-PBGA-B56	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PBGA-B56
length	7 mm	9.7 mm	12.5 mm	9.7 mm	12.5 mm	7 mm
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER
MaximumI(ol)	0.1 A	0.1 A	0.1 A	0.1 A	0.1 A	0.1 A
Number of digits	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1
Number of ports	2	2	2	2	2	2
Number of terminals	56	48	48	48	48	56
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	OPEN-DRAIN/3-STATE	OPEN-DRAIN/3-STATE	OPEN-DRAIN/3-STATE	OPEN-DRAIN/3-STATE	OPEN-DRAIN/3-STATE	OPEN-DRAIN/3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VFBGA	TSSOP	TSSOP	TSSOP	TSSOP	VFBGA
Encapsulate equivalent code	BGA56,6X10,25	TSSOP48,.25,16	TSSOP48,.3,20	TSSOP48,.25,16	TSSOP48,.3,20	BGA56,6X10,25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	260
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Maximum supply current (ICC)	40 mA	40 mA	40 mA	40 mA	40 mA	40 mA
propagation delay (tpd)	8.6 ns	8.6 ns	8.6 ns	8.6 ns	8.6 ns	8.6 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1 mm
Maximum supply voltage (Vsup)	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage (Vsup)	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	BALL	GULL WING	GULL WING	GULL WING	GULL WING	BALL
Terminal pitch	0.65 mm	0.4 mm	0.5 mm	0.4 mm	0.5 mm	0.65 mm
Terminal location	BOTTOM	DUAL	DUAL	DUAL	DUAL	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
translate	GTLP & LVTTL	GTLP & LVTTL	GTLP & LVTTL	GTLP & LVTTL	GTLP & LVTTL	GTLP & LVTTL
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	4.5 mm	4.4 mm	6.1 mm	4.4 mm	6.1 mm	4.5 mm
Prop。Delay @ Nom-Su	7.1 ns	7.1 ns	7.1 ns	7.1 ns	-	7.1 ns

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