Figure 13. CDB5510 Top Side Layout .......................................................................................... 20
Figure 14. CDB5510 Bottom Side Layout ..................................................................................... 21
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts
LabWindows and CVI are registered trademarks of National Instruments Corporation, MICROWIRE is a trademark of National Semiconductor Corporation, SPI
is a registered trademark of International Business Machines Corporation, Windows 95 is a registered trademark of Microsoft Corporation.
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-
mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any
kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third
parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publi-
cation may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise)
without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the
printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photo-
graphic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or
sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in
this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade-
marks and service marks can be found at http://www.cirrus.com.
2
DS337DB2
CDB5510/11/12/13
1. HARDWARE
1.1 Introduction
The CDB5510/11/12/13 evaluation system pro-
vides a quick means of testing the
CS5510/11/12/13 Analog-to-Digital Converters
(ADCs). The CDB5510 evaluation board accepts
any of the four converters via an 8-pin SOIC sock-
et, and interfaces directly to a PC running though
an RS-232 serial interface.
The included analysis software allows the user to
control
the
various
functions
of
the
CS5510/11/12/13, as well as capture and save data.
The software also provides data analysis tools to
display the time domain, frequency domain, and
noise histogram performance for a captured set of
data.
1.3 Analog Inputs
Analog input signals can be connected to the con-
verter’s inputs via the CDB5510’s AIN+ and AIN-
inputs (connector J3). Note that a simple RC net-
work filters the input to reduce broadband noise.
Both of the analog inputs can also be tied to the V-
supply by changing the position of HDR4 and
HDR5, or to the output of the amplifier section as
shown in Table 1. For a differential input the jump-
ers should be set to the “Direct Differential Input”
setting, and for a single-ended input on AIN+, the
jumpers should be set to the “Direct Single-Ended
Input” setting. The jumpers can also be set to con-
figure an amplifier input, if it is installed on the
evaluation board. The amplifier section of the
board is discussed in more detail in section 1.7.
Input
Direct
Differential
Input
Direct
Single-Ended
Input
Differential
Amplifier
Input
Single-Ended
Amplifier
Input
HDR4
AIN+ O
AMP+ O
V- O
AIN+ O
AMP+ O
V- O
AIN+ O
AMP+ O
V- O
AIN+ O
AMP+ O
V- O
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
O AIN+
HDR5
AIN- O
AMP- O
V- O
AIN- O
AMP- O
V- O
AIN- O
AMP- O
V- O
AIN- O
AMP- O
V- O
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
O AIN-
1.2 Power Supply Options
The CS5510/11/12/13 ADCs are designed to oper-
ate from a supply voltage difference of 5 to 6 V be-
tween V+ and V-. The parts may be run from a
single 5 V supply, or any combination of voltages
that produce a 5 V span, such as +3 V and -2 V or
±
2.5 V. The CDB5510 evaluation board supports
both single and dual supply configurations. For a
single supply, both the V- and GND posts should
be connected to 0 V, and the V+ post should be
connected to the positive supply voltage. For dual
supply configurations, the GND post should be
connected to 0 V, the positive supply should be
connected to the V+ post, and the negative supply
should be connected to the V- post. Because the
RS-232 transceiver used on the board requires at
least 3 V for its supply voltage, it is recommended
that the V+ post always be at least 3 V for proper
operation of the evaluation board. If a different mi-
crocontroller is interfaced to the CS5510/11/12/13
through HDR6, other supply voltages may be used.
Table 1. Analog Input Selection With HDR4 and HDR5
1.4 Voltage Reference Options
The evaluation system provides three voltage refer-
ence options. The VREF pin can be connected to
the on-board 2.5V reference, to the positive supply
rail, or to an external voltage reference source via
HDR3, as shown in Table 2. When the HDR3
jumper on the CDB5510 is in the”V+” position, the
eval board’s supply voltage is selected. When this
jumper is in the “LT1019” position, the on-board
reference provides an absolute voltage level of 2.5
volts (the LT1019 was chosen for its low drift, typ-
3
DS337DB2
CDB5510/11/12/13
ically 5ppm/°C). By setting HDR3’s jumper to the
“REF” position, the user can supply an external
voltage reference to J1’s REF input. V- is also pro-
vided at connector J1 to allow an easy connection
to the negative supply. (Application Note 4 on Cir-
rus Logic’s web site details various voltage refer-
ences).
Reference
V+
Description
Selects Analog
Power Supply
Selects on board
LT1019 Reference
(5ppm/
°C)
HDR3
V+ O
LT1019 O
REF O
V+ O
LT1019 O
REF O
O VREF
O VREF
O VREF
O VREF
O VREF
O VREF
2) The 32 kHz on-board oscillator circuit (shown in
Figure 11) can be used by connecting HDR7 on the
CDB5510 board and selecting the “On-board or ex-
ternal clock source” option in the software. The
DIP switches on the evaluation board should be set
as shown in the “CS5510/12 External Clock” sec-
tion of Table 3.
3) An external clock can be provided by the user,
and connected to the SCLK post on HDR7. The
“On-board or external clock source” option in the
software should be selected when using an external
clock source, and the DIP switches on the evalua-
tion board should be set as shown in the
“CS5510/12 External Clock” section of Table 3.
The CS5511 and CS5513 include an internal oscil-
lator, and as such, need no external oscillator to
run. When using the CS5511 or CS5513, HDR7 on
the CDB5510 board should be left disconnected,
and the “CS5511/13 Internally Clocked” option
should be selected in the software. Likewise, the
Eval Board Mode
CS5511/13 Internally Clocked
X is OPEN
A is OPEN
B is OPEN
CS5510/12 Clock From 8515
X is OPEN
A is CLOSED
B is CLOSED
CS5510/12 External Clock
X is OPEN
A is OPEN
B is CLOSED
RS-232 Test Mode
X is CLOSED
A is CLOSED
B is CLOSED
SW1 Settings
1
2
3
LT1019
Selects external
EXTERNAL reference source
connected to J1
V+ O
LT1019 O
REF O
O VREF
O VREF
O VREF
Table 2. Voltage Reference Selection Using HDR3
1.5 Clocking Options
The CS5510/11/12/13 are very simple ADCs, in-
tended to continuously convert and output data
when not in sleep mode. The CS5510 and CS5512
require an external clock signal on the SCLK input
pin to run properly. The CDB5510 evaluation
board provides three options for this clock source:
1) The microcontroller can be used to generate a
clock for the CS5510/12. The microcontroller’s
clock can be selected by removing the jumper from
HDR7 on the CDB5510 board, and selecting the
“CS5510/12 Clock from microcontroller” option in
the software. The DIP switches on the evaluation
board should be set as shown in the “CS5510/12
Clock from 8515” section of Table 3. The clock
frequency can be selected by changing the “Oscil-
lator Frequency” box in the software. Note that the
frequency options are limited by the microcontrol-
ler’s counter/timer circuitry, which divides the
3.6864 MHz clock by integer values to produce the
clock output.
OPEN
X A B
1
2
3
OPEN
X A B
1
2
3
OPEN
X A B
1
2
3
OPEN
X A B
Table 3. DIP Switch Settings
4
DS337DB2
CDB5510/11/12/13
DIP switches on the CDB5510 should be set to the
“CS5511/13 Internally Clocked” section of Table
3.
plifier will be 10 in the single configuration, or 21
in the dual configuration. Different gain values can
be achieved by changing the value of resistors R6,
R17, and R18.
1.6 PC Interface
The evaluation system comes with software and an
RS-232 cable to link the evaluation board to the
PC. The executable software was developed with
LabWindows/CVI and meant to run under Win-
dows
95 or 98. After installing the software, read
the readme.txt file for any last minute changes in
the software. Additionally,
Section 2.0: Software
in this document further details how to install and
use the software.
1.8 Interfacing to an External Controller
The ADC serial interface is
SPI
and
MICROW-
IRE
TM
compatible. The interface control lines (CS,
SDO, and SCLK) are connected to the 8515 micro-
controller on the CDB5510. The ADCs can be in-
terfaced to an external microcontroller through
HDR6 on the CDB5510. To accomplish this, the
CDB5510 board must be modified in one of three
ways: 1) remove the microcontroller from its sock-
et, 2) remove resistors R20-R22, or 3) cut the inter-
face control traces between the microcontroller and
the header.
1.7 Adding an Amplifier to the CDB5510
The CDB5510 is laid out so that a standard 8-pin
SOIC dual op-amp of the user’s choosing can be in-
stalled on the board to allow evaluation of the
CS5510/11/12/13’s performance with an op-amp
front-end. If an op-amp front-end is desired, the ad-
ditional components such as feedback resistors and
bypass capacitors must also be installed on the
board. A schematic of the amplifier section includ-
ing some typical component values is shown in
Figure 9. The amplifier is configured to operate in
either a single non-inverting, or a dual differential
configuration. The mode of operation can be select-
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