AX88655 AB
5-Port 10/100/1000BASE-T Ethernet Switch
5-Port Gigabit Ethernet Switch with Embedded Memory
Document No.: AX88655AB / V0.8 / June 11, 2003
Features
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5-port Gigabit Ethernet switch integrating MACs,
packet buffer memory and switching engine with
RGMII/GMII/MII interface
RGMII support REV 1.3 with 3.3V IO
Full Duplex 1000 Mbit/s.
Full and Half Duplex 10/100 Mbit/s
Supports auto-sensing or manual selection for
speed and duplex capability with an embedded
MPU
Store-and-forward operation support
Performs full wire-speed switching with Head of
Line (HOL) blocking prevention
Supports up to 8 Port-based VLAN Groups
Supports broadcast storm filtering
.
Quality-of-Service provisioning on 802.1P tag and
port-pairs with two priority queues
By-port Egress/Ingress bandwidth (rate) control
Embedded 128K Byte SRAM for packet buffer
Supports packet length up to 1522 bytes
Supports 9K/12K byte JUBMO packet
Integrated two-way Address-Lookup engine and
table for 4K MAC addresses
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Programmable aging mechanism for the two-way
4K MAC addresses table
Two hashing schemes: direct and XOR mode.
Support ingress port security mode, incoming
packets with unknown source MAC address could
be dropped
Egress/Ingress Port Mirroring for Sniffer function
.
Flow control
- Full-duplex IEEE 802.3x flow control
- Half-duplex back pressure flow control
- Optional smart flow control for mix-speed
connection
Supports port-based trunking for high-bandwidth
links
Provides 5 GPIO ports
Provides EEPROM interface for auto-configuration
System clock input is one 25MHz Crystal and one
125MHz from PHY GCLK output
1.8 and 3.3V operations
3.3 I/Os and packaged in 272-pin BGA
Product Description
The AX88655AB is an 5-port 10/100/1000 Mbps Ethernet switch with, GMII/RGMII or MII Interface. The switch
controller provides network system manufacturers the ideal platform for building smart and cost-effective backbone
switches for small to medium sized businesses.
The AX88655AB 5-port 10/100/100 BASE-T single chip switch controllers combine the benefits of network
simplicity, flexibility and high integration. Its highly integrated feature set enables network system manufacturers to
build smart switches for the fast-growing small to medium business market segment.
Benefits of AX88655AB Switches are below.
Simplicity
Provides a smart, simple and low maintenance plug-and-play network interconnect system for small to
medium size businesses
Flexibility
Highly scalable configuration allows system manufacturers to enable or disable a range of features to best
meet their target price point.
Integration
Highly integrated design drives down overall switch manufacturing costs.
Target Applications
5-port Gigabit Layer 2 Switches for workgroup
High-port count Layer 2 switches with trunking
High performance solution of Ethernet backbone
ASIX ELECTRONICS CORPORATION
4F, NO.8, Hsin Ann Rd., Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
FAX: 886-3-563-9799
TEL: 886-3-579-9500
First Released Date: 11/07/2002
http://www.asix.com.tw
AX88655AB 5-Port 10/100/1000BASE-T Ethernet Switch
System Block Diagram
CONFIDENTIAL
AX88655AB
Switch Controller
EEPROM
5 * 10/100/1000Mbps PHYs
Always contact ASIX for possible updates before starting a design.
This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify the product specification without notice. No
liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
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ASIX ELECTRONICS CORPORATION
AX88655AB 5-Port 10/100/1000BASE-T Ethernet Switch
CONFIDENTIAL
CONTENTS
1.0 AX88655AB OVERVIEW.........................................................................................................................................5
1.1 G
ENERAL
D
ESCRIPTION
............................................................................................................................5
1.2 AX88655AB B
LOCK
D
IAGRAM
.............................................................................................5
1.3 P
IN
C
ONNECTION
D
IAGRAM
...................................................................................................................6
2.0 I/O DEFINITION.......................................................................................................................................................7
2.1 RGMII/GMII/MII I
NTERFACE
.............................................................................................................7
2.2 M
ISCELLANEOUS
..........................................................................................................................................9
3.0 FUNCTIONAL DESCRIPTION ............................................................................................................................11
3.1 I
NTRODUCTION
............................................................................................................................................11
3.2 P
ACKET
F
ILTERING AND
F
ORWARDING
P
ROCESS
.....................................................................11
3.3 MAC A
DDRESS
R
OUTING
, L
EARNING AND
A
GING
P
ROCESS
.............................................11
3.4 F
ULL
D
UPLEX
802.3
X
F
LOW
C
ONTROL
.........................................................................................11
3.5 H
ALF
D
UPLEX
B
ACK
P
RESSURE
C
ONTROL
..................................................................................11
3.6 MII P
OLLING
................................................................................................................................................11
3.7 P
ORT
-B
ASED
Q
O
S: P
ORT
-P
AIR
.........................................................................................................11
3.8 VLAN
AND
B
ROADCAST
S
TORMING
P
REVENTION
................................................................12
3.9 S
ECURITY
O
PERATION
- P
ORT
SA
RESTRICTION
.....................................................................12
3.10 I
NGRESS
/E
GRESS
B
ANDWIDTH
C
ONTROL
S
CHEME
.............................................................12
3.11 P
ORT
M
IRRORING
....................................................................................................................................12
4.0 REGISTER DESCRIPTIONS ................................................................................................................................13
5.0 ELECTRICAL SPECIFICATION AND TIMING...............................................................................................21
5.1 A
BSOLUTE
M
AXIMUM
R
ATINGS
........................................................................................................21
5.2 G
ENERAL
O
PERATION
C
ONDITIONS
.................................................................................................21
5.3 DC C
HARACTERISTICS
............................................................................................................................21
5.4 AC
SPECIFICATIONS
..................................................................................................................................22
6.0 PACKAGE INFORMATION .................................................................................................................................27
APPENDIX A: SYSTEM APPLICATIONS ...............................................................................................................30
APPENDIX B: DESIGN NOTE....................................................................................................................................31
APPENDIX C: WEIGHT SETTING FOR QOS ........................................................................................................32
APPENDIX D: RESOLUTION INGRESS/EGRESS FOR BANDWIDTH CONTROL .......................................32
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ASIX ELECTRONICS CORPORATION
AX88655AB 5-Port 10/100/1000BASE-T Ethernet Switch
CONFIDENTIAL
FIGURES
F
IG
-1 AX88655AB B
LOCK
D
IAGRAM
................................................................................................................................5
F
IG
-2 T
OP
V
IEW OF
AX88655AB AB P
IN
D
IAGRAM
.........................................................................................................6
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ASIX ELECTRONICS CORPORATION
AX88655AB 5-Port 10/100/1000BASE-T Ethernet Switch
CONFIDENTIAL
1.0 AX88655AB Overview
1.1 General Description
The AX88655AB Gigabit switch controller supports eight 10/100/1000 Mbps ports in wire-speed operation. The
AX88655AB Gigabit switch controller provides eight 10/100/1000 Ethernet ports with RGMII/GMII/MII interface. For
each ports, the AX88655AB supports GMII/RGMII (802.3ab, 1000BASE-T) interface with full-duplex operation at
Gigabit speed, full- or half-duplex operation at 10/100 Mbps speed (using 802.3/u, 10/100BASE-T) and polls the status
of PHYs with an embedded MPU.
The device supports 4K internal MAC addresses which are shared by all ports with an embedded SRAM. The
learning/routing engine is implemented with a two-way hash/linear algorithm to reduce possibility of routing collision.
Basically the AX88655AB supports non-blocking wire speed forwarding rate and no Head-of-Line (HOL) blocking
issue. The AX88655AB provides two flow-control mechanisms to avoid loss of data: an optional jamming based
backpressure flow control in the half-duplex operation and IEEE 802.3x in the full-duplex mode.
To support Quality of Service (QoS), each output port has two priority queues and their assignment can be based on the
802.1p priority field or Port-Pair setting. Each output port retrieves the frames from the shared buffer based on queuing
and sends them to the transmitting (Tx) FIFO.
1.2 AX88655AB Block Diagram
Routing /Learning
Engine
RGMII/GMII PHY
RGMII/GMII PHY
RGMII/GMII PHY
RGMII/GMII PHY
RGMII/GMII PHY
10/100/1000 MAC
10/100/1000 MAC
10/100/1000 MAC
10/100/1000 MAC
10/100/1000 MAC
Packet
Buffer
General Purpose
I/O Interface (GPIO)
EEPROM
Interface
High Speed
Switch Fabric
Buffer Manager
Address Look-up Table
GPIO
Configuration
Logic
Fig-1 AX88655AB Block Diagram
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ASIX ELECTRONICS CORPORATION
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