The DG401, DG403, DG405 monolithic analog switches
were designed to provide precision, high performance
switching of analog signals. Combining low power (0.35 µW,
typ.) with high speed (t
ON
: 75 ns, typ.), the DG401 series is
ideally suited for portable and battery powered industrial and
military applications.
Built on the Vishay Siliconix proprietary high-voltage
silicon-gate process to achieve high voltage rating and
superior switch on/off performance, break-before-make is
guaranteed for the SPDT configurations. An epitaxial layer
prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks up to 30 V peak-to-peak when off. On-
resistance is very flat over the full ± 15 V analog range,
rivaling JFET performance without the inherent dynamic
range limitations.
The three devices in this series are differentiated by the type
of switch action as shown in the functional block diagrams.
FEATURES
•
•
•
•
•
•
•
•
•
44 V supply max. rating
± 15 V analog signal range
On-resistance - R
DS
(on): 30
Ω
Low leakage - I
D(on)
: 40 pA
Fast switching - t
ON
: 75 ns
Ultra low power requirements - P
D
: 0.35 µW
TTL, CMOS compatible
Single supply capability
Compliant to RoHS directive 2002/95/EC
BENEFITS
• Wide dynamic range
• Break-before-make switching action
• Simple interfacing
APPLICATIONS
•
•
•
•
•
•
Audio and video switching
Sample-and-hold circuits
Battery operation
Test equipment
Communications systems
PBX, PABX
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG401
Dual-In-Line and SOIC
NC
D
1
NC
NC
NC
NC
NC
NC
D
2
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
S
1
IN
1
V-
GND
V
L
V+
IN
2
S
2
NC
NC
NC
NC
NC
4
5
6
7
8
9
NC
10
Key
3
DG401
LCC
D
1
2
NC
1
S
1
20
IN
1
19
18
17
16
15
14
11
NC
12
S
2
13
IN
2
V-
GND
NC
V
L
V+
Two SPST Switches per Package
TRUTH TABLE
Logic
0
1
Logic "0"
≤
0.8 V
Logic "1"
≥
2.4 V
Switch
OFF
ON
D
2
Top View
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 70049
S09-2561-Rev. I, 30-Nov-09
www.vishay.com
1
DG401, DG403, DG405
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG403
Dual-In-Line and SOIC
D
1
NC
D
3
S
3
S
4
D
4
NC
D
2
1
2
3
4
5
6
7
8
Top View
16 S
1
15
14
13
12
11
10
9
IN
1
V-
GND
V
L
V+
IN
2
S
2
S
4
D
4
S
3
NC
Key
4
5
6
7
8
9
10
DG403
LCC
NC D
1
NC
3
2
1
S
1
20
IN
1
19
18
17
16
15
14
11
12
S
2
13
IN
2
V-
GND
NC
V
L
V+
D
3
Two SPDT Switches per Package
TRUTH TABLE
Logic
0
1
Logic "0"
≤
0.8 V
Logic "1"
≥
2.4 V
SW
1
, SW
2
OFF
ON
SW
3
, SW
4
ON
OFF
NC D
2
NC
Top View
DG405
Dual-In-Line and SOIC
D
1
NC
D
3
S
3
S
4
D
4
NC
D
2
1
2
3
4
5
6
7
8
16 S
1
15
14
13
12
11
10
9
IN
1
V-
GND
V
L
V+
IN
2
S
2
D
3
S
3
NC
S
4
D
4
4
5
6
7
8
9
10
Key
3
2
DG405
LCC
NC D
1
NC
1
S
1
20
IN
1
19
18
17
16
15
14
11
12
S
2
13
IN
2
V-
GND
NC
V
L
V+
Two DPST Switches per Package
TRUTH TABLE
Logic
0
1
Logic "0"
≤
0.8 V
Logic "1"
≥
2.4 V
Switch
OFF
ON
NC D
2
NC
Top View
Top View
www.vishay.com
2
Document Number: 70049
S09-2561-Rev. I, 30-Nov-09
DG401, DG403, DG405
Vishay Siliconix
ORDERING INFORMATION
Temp. Range
DG401
16-Pin Plastic DIP
- 40 °C to 85 °C
16-Pin Narrow SOIC
DG403
16-Pin Plastic DIP
- 40 °C to 85 °C
16-Pin Narrow SOIC
DG405
16-Pin Plastic DIP
- 40 °C to 85 °C
16-Pin Narrow SOIC
DG405DJ
DG405DJ-E3
DG405DY
DG405DY-E3
DG405DY-T1
DG405DY-T1-E3
DG403DJ
DG403DJ-E3
DG403DY
DG403DY-E3
DG403DY-T1
DG403DY-T1-E3
DG401DJ
DG401DJ-E3
DG401DY
DG401DY-T1
DG401DY-E3
DG401DY-T1-E3
Package
Part Number
ABSOLUTE MAXIMUM RATINGS
Parameter
V+ to V-
GND to V-
V
L
Digital Inputs
a
, V
S
, V
D
Current (Any Terminal) Continuous
Current, S or D (Pulsed 1 ms, 10 % Duty)
Storage Temperature
Power Dissipation (Package)
b
(DJ, DY Suffix)
16-Pin Plastic DIP
c
16-Pin SOIC
d
Limit
44
25
(GND - 0.3) to (V+) + 0.3
(V-) - 2 to (V+) + 2
or 30 mA, whichever occurs first
30
100
- 65 to 125
450
600
mW
mA
°C
V
Unit
Notes:
a. Signals on S
X
, D
X
, or IN
X
exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 7.6 mW/°C above 75 °C.
Document Number: 70049
S09-2561-Rev. I, 30-Nov-09
www.vishay.com
3
DG401, DG403, DG405
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Specified
V+ = 15 V, V- = - 15 V
Parameter
Analog Switch
Analog Signal Range
e
Drain-Source
On-Resistance
Δ
Drain-Source
On-Resistance
Symbol
V
ANALOG
R
DS(on)
ΔR
DS(on)
I
S(off)
Switch Off Leakage Current
I
D(off)
Channel On Leakage Current
Digital Control
Input Current V
IN
Low
Input Current V
IN
High
Dynamic Characteristics
Turn-On Time
Turn-Off Time
Break-Before-Make
Time Delay (DG403)
Charge Injection
Off Isolation Reject Ratio
Channel-to-Channel Crosstalk
Source Off Capacitance
Drain Off Capacitance
Channel On Capacitance
Power Supplies
Positive Supply Current
Negative Supply Current
Logic Supply Current
Ground Current
I+
I-
I
L
I
GND
V+ = 16.5 V, V- = - 16.5 V
V
IN
= 0 or 5 V
Room
Full
Room
Full
Room
Full
Room
Full
0.01
- 0.01
0.01
- 0.01
-1
-5
-1
-5
1
5
1
5
µA
t
ON
t
OFF
t
D
Q
OIRR
X
TALK
C
S(off)
C
D(off)
C
D
, C
S(on)
f = 1 MHz, V
S
= 0 V
R
L
= 300
Ω,
C
L
= 35 pF
See Figure 2
R
L
= 300
Ω,
C
L
= 35 pF
C
L
= 10 nF
V
gen
= 0 V, R
gen
= 0
Ω
R
L
= 100
Ω,
C
L
= 5 pF
f = 1 MHz
Room
Room
Room
Room
Room
Room
Room
Room
Room
75
30
35
60
72
90
12
12
39
pF
5
pC
dB
150
100
ns
I
IL
I
IH
V
IN
under test = 0.8 V
All Other = 2.4 V
V
IN
under test = 2.4 V
All Other = 0.8 V
Full
Full
0.005
0.005
-1
-1
1
µA
1
I
D(on)
I
S
= - 10 mA, V
D
=
±
10 V
V+ = 13.5 V, V- = - 13.5 V
I
S
= - 10 mA, V
D
=
±
5 V, 0 V
V+ = 16.5 V, V- = - 16.5 V
V+ = 16.5 V, V- = - 16.5 V
V
D
=
±
15.5 V, V
S
=
±
15.5 V
V+ = 16.5 V, V- = - 16.5 V
V
S
= V
D
=
±
15.5 V
V
L
= 5 V, V
IN
= 2.4 V, 0.8 V
f
Temp.
b
Full
Room
Full
Room
Full
Room
Hot
Room
Hot
Room
Hot
30
3
- 0.01
- 0.01
- 0.04
- 0.5
-5
- 0.5
-5
-1
- 10
Typ.
c
D Suffix
- 40 °C to 85 °C
Min.
d
- 15
Max.
d
15
45
55
3
5
0.5
5
0.5
5
1
10
Unit
V
Ω
nA
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
4
Document Number: 70049
S09-2561-Rev. I, 30-Nov-09
DG401, DG403, DG405
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
7
6
5
V
TH
(V)
4
3
2
1
0
0
2
4
6
8
10
12
14
16
18
V+ = 15 V
V- = -15 V
SW1, 2
2.5
V
L
= 7 V
SW3, 4
2
1.5
1
0.5
0
5
10
15
20
(V+)
25
30
35
V
L
- Logic Supply (V)
V
L
= 5 V
3.5
3
V
T
(V)
Input Switching Threshold vs. Logic Supply Voltage
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