MB91460D Series
FR60 32-bit Microcontroller
MB91460D series is a line of general-purpose 32-bit RISC microcontrollers designed for embedded control applications which require
high-speed real-time processing, such as consumer devices and on-board vehicle systems. This series uses the FR60 CPU, which
is compatible with the FR family of CPUs.
This series contains the LIN-USART and CAN controllers.
Features
FR60 CPU core
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32-bit RISC, load/store architecture, five-stage pipeline
16-bit fixed-length instructions (basic instructions)
Instruction execution speed: 1 instruction per cycle
Instructions including memory-to-memory transfer, bit
manipulation, and barrel shift instructions: Instructions suitable
for embedded applications
Function entry/exit instructions and register data multi-load
store instructions : Instructions supporting C language
Register interlock function: Facilitating assembly-language
coding
Built-in multiplier with instruction-level support
❐
Signed 32-bit multiplication: 5 cycles
❐
Signed 16-bit multiplication: 3 cycles
Interrupts (save PC/PS) : 6 cycles (16 priority levels)
Harvard architecture enabling program access and data
access to be performed simultaneously
Instructions compatible with the FR family
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Bit search module (for REALOS)
❐
Function to search from the MSB (most significant bit) for the
position of the first “0”, “1”, or changed bit in a word
LIN-USART (full duplex double buffer): 5 channels
❐
Clock synchronous/asynchronous selectable
❐
Sync-break detection
❐
Internal dedicated baud rate generator
I
2
C bus interface (supports 400 kbps): 3 channels
❐
Master/slave transmission and reception
❐
Arbitration function, clock synchronization function
CAN controller (C-CAN): 3 channels
❐
Maximum transfer speed: 1 Mbps
❐
32 transmission/reception message buffers
Stepper motor controller : 6 channels
❐
4 high current output to each channel
❐
2 synchronized PWMs per channel (8/10-bit)
Sound generator : 1 channel
❐
Tone frequency : PWM frequency divide-by-two (reload value
1)
Alarm comparator : 1 channel
❐
Monitor external voltage
❐
Generate an interrupt in case of voltage lower/higher than
the defined thresholds (reference voltage)
16-bit PPG timer : 12 channels
16-bit PFM timer : 1 channel
16-bit reload timer: 8 channels
16-bit free-run timer: 8 channels (1 channel each for ICU and
OCU)
Input capture: 8 channels (operates in conjunction with the
free-run timer)
Output compare: 4 channels (operates in conjunction with the
free-run timer)
Up/Down counter: 3 channels (3*8-bit or 1*16-bit + 1*8-bit)
Watchdog timer
Real-time clock
Low-power consumption modes : Sleep/stop mode function
Supply Supervisor: Low voltage detection circuit for external
V
DD
5 and internal 1.8V core voltage
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Internal peripheral resources
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General-purpose ports : Maximum 170 ports
DMAC (DMA Controller)
❐
Maximum of 5 channels able to operate simultaneously.
(External to external : 1 channel)
❐
3 transfer sources (external pin/internal peripheral/software)
❐
Activation source can be selected using software.
❐
Addressing mode specifies full 32-bit addresses
(increment/decrement/fixed)
❐
Transfer mode (demand transfer/burst transfer/step
transfer/block transfer)
❐
Fly-by transfer support (between external I/O and memory)
❐
Transfer data size selectable from 8/16/32-bit
❐
Multi-byte transfer enabled (by software)
❐
DMAC descriptor in I/O areas (200
H
to 240
H
, 1000
H
to
1024
H
)
A/D converter (successive approximation type)
❐
10-bit resolution: 24 channels
❐
Conversion time: minimum 1
s
External interrupt inputs : 14 channels
❐
8 channels shared with CAN RX or I2C pins
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Cypress Semiconductor Corporation
Document Number: 002-04613 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised April 6, 2016
MB91460D Series
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Clock supervisor
❐
Monitors the sub-clock (32 kHz) and the main clock
(4 MHz) , and switches to a recovery clock (CR oscillator,
etc.) when the oscillations stop.
Clock modulator
Clock monitor
Sub-clock calibration
❐
Corrects the real-time clock timer when operating with the 32
kHz or CR oscillator
Main oscillator stabilization timer
❐
Generates an interrupt in sub-clock mode after the
stabilization wait time has elapsed on the 23-bit stabilization
wait time counter
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Sub-oscillator stabilization timer
❐
Generates an interrupt in main clock mode after the
stabilization wait time has elapsed on the 15-bit stabilization
wait time counter
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Package and technology
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Package : QFP-208
CMOS 0.18
m technology
Power supply range 3 V to 5 V (1.8 V internal logic provided by
a step-down voltage converter)
Operating temperature range: between
■
40°C and
105°C
Document Number: 002-04613 Rev. *A
Page 2 of 137
MB91460D Series
Contents
Product Lineup ................................................................. 4
Pin Assignment ................................................................ 7
MB91F465DA, MB91F467Dx ...................................... 7
Pin Description ................................................................. 8
MB91F465DA, MB91F467Dx ...................................... 8
I/O Circuit Types ............................................................. 16
Handling Devices ............................................................ 22
Preventing Latch-up .................................................. 22
Handling of unused input pins ................................... 22
Power supply pins ..................................................... 22
Crystal oscillator circuit .............................................. 22
Notes on using external clock ................................... 22
Mode pins (MD_x) ..................................................... 23
Notes on operating in PLL clock mode ...................... 23
Pull-up control ........................................................... 23
Notes on PS register ................................................. 23
Notes on Debugger ........................................................ 24
Execution of the RETI Command .............................. 24
Break function ........................................................... 24
Operand break .......................................................... 24
Block Diagram ................................................................ 25
MB91F465DA, MB91F467Dx .................................... 25
CPU and Control Unit ..................................................... 26
Features .................................................................... 26
Internal architecture ................................................... 26
Programming model .................................................. 27
Registers ................................................................... 28
Embedded Program/data Memory (Flash) ................... 31
Flash features ............................................................ 31
Operation modes ....................................................... 31
Flash access in CPU mode ....................................... 32
Parallel Flash programming mode ............................ 36
Poweron Sequence in parallel programming mode .. 38
Flash Security ............................................................ 38
Memory Space ................................................................ 41
Memory Maps .................................................................. 42
MB91F465DA, MB91F467Dx .................................... 42
I/O Map ............................................................................. 43
MB91F465DA, MB91F467Dx .................................... 43
Flash memory and external bus area ........................ 69
Interrupt Vector Table .................................................... 71
Recommended Settings ................................................. 76
PLL and Clockgear settings ...................................... 76
Clock Modulator settings ........................................... 77
Electrical Characteristics ............................................... 83
Absolute maximum ratings ........................................ 83
Recommended operating conditions ......................... 86
DC characteristics ..................................................... 87
A/D converter characteristics .................................... 91
Alarm comparator characteristics .............................. 95
FLASH memory program/erase characteristics ........ 96
AC characteristics ..................................................... 97
Ordering Information ................................................... 132
Package Dimension ...................................................... 133
Revision History ........................................................... 134
Document History ......................................................... 136
Document Number: 002-04613 Rev. *A
Page 3 of 137
MB91460D Series
1. Product Lineup
Feature
Max. core frequency (CLKB)
Max. resource frequency (CLKP)
Max. external bus freq. (CLKT)
Max. CAN frequency
(CLKCAN)
Max. FlexRay frequency (SCLK)
Technology
Watchdog timer
Watchdog timer
(RC osc. based)
Bit Search
Reset input (INITX)
Hardware Standby input (HSTX)
Clock Modulator
Clock Monitor
Low Power Mode
DMA
MAC (uDSP)
MMU/MPU
MB91V460A
80MHz
40MHz
40MHz
20MHz
-
0.35μm
yes
yes (disengageable)
yes
yes
yes
yes
yes
yes
5 ch
no
MPU (16 ch)
1)
Emulation SRAM 32bit read
data
-
-
64 KByte
64 KByte
16 KByte
4 KByte fixed
1 ch
8 ch
8 ch
8 ch
8 ch
MB91F465DA
100MHz
50MHz
50MHz
50MHz
-
0.18μm
yes
yes
yes
yes
no
yes
yes
yes
5 ch
no
MPU (8 ch)
1)
MB91F467DA
MB91F467DB
96MHz
48MHz
48MHz
48MHz
-
0.18μm
yes
yes
yes
yes
no
yes
yes
yes
5 ch
no
MPU (8 ch)
1)
Flash memory
Satellite Flash memory
Flash Protection
D-RAM
ID-RAM
Flash-Cache
(Instruction cache)
Boot-ROM / BI-ROM
RTC
Free Running Timer
ICU
OCU
Reload Timer
544 KByte
no
yes
32 KByte
16 KByte
8 KByte
4 KByte
1 ch
8 ch
8 ch
4 ch
8 ch
1088 KByte
no
yes
32 KByte
32 KByte
8 KByte
4 KByte
1 ch
8 ch
8 ch
4 ch
8 ch
Document Number: 002-04613 Rev. *A
Page 4 of 137
MB91460D Series
Feature
PPG 16-bit
PFM 16-bit
Sound Generator
Up/Down Counter (8/16-bit)
C_CAN
LIN-USART
I2C (400k)
FR external bus
External Interrupts
NMI Interrupts
SMC
LCD controller (40x4)
ADC (10 bit)
Alarm Comparator
Supply Supervisor
(low voltage detection)
Clock Supervisor
Main clock oscillator
Sub clock oscillator
RC Oscillator
PLL
DSU4
EDSU
Supply Voltage
Regulator
Power Consumption
Temperature Range (Ta)
Package
Document Number: 002-04613 Rev. *A
MB91V460A
16 ch
1 ch
1 ch
4 ch (8-bit) / 2 ch (16-bit)
6 ch (128msg)
4 ch + 4 ch FIFO + 8 ch
4 ch
yes (32bit addr, 32bit data)
16 ch
1 ch
6 ch
1 ch
32 ch
2 ch
MB91F465DA
12 ch
1 ch
1 ch
3 ch (8-bit) / 1 ch (16-bit)
3 ch (32msg)
1 ch + 4 ch FIFO
3 ch
yes (26bit addr, 32bit data)
14 ch
-
6 ch
-
24 ch
1 ch
MB91F467DA
MB91F467DB
12 ch
1 ch
1 ch
3 ch (8-bit) / 1 ch (16-bit)
3 ch (32msg)
1 ch + 4 ch FIFO
3 ch
yes (26bit addr, 32bit data)
14 ch
-
6 ch
-
24 ch
1 ch
yes
yes
4MHz
32kHz
100kHz
x 20
yes
yes (32 BP)
*1
3V / 5V
yes
n.a.
0..70 C
BGA660
yes
yes
4MHz
32kHz
100kHz / 2MHz
x 25
-
yes (16 BP)
*1
3V / 5V
yes
<1W
-40..105 C
QFP208
yes
yes
4MHz
32kHz
100kHz / 2MHz
x 24
-
yes (16 BP)
*1
3V / 5V
yes
<1W
-40..105 C
QFP208
Page 5 of 137
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