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DTA115TM3T5G

Description
Bipolar Transistors - Pre-Biased PNP DIGITAL TRANSISTOR
CategoryDiscrete semiconductor    The transistor   
File Size164KB,11 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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DTA115TM3T5G Overview

Bipolar Transistors - Pre-Biased PNP DIGITAL TRANSISTOR

DTA115TM3T5G Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
package instructionSMALL OUTLINE, R-PDSO-F3
Contacts3
Manufacturer packaging code631AA
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time8 weeks
Other featuresBUILT IN BIAS RESISTOR
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)160
JESD-30 codeR-PDSO-F3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typePNP
Maximum power dissipation(Abs)0.6 W
surface mountYES
Terminal surfaceTin (Sn)
Terminal formFLAT
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
MUN2141, MMUN2141L,
MUN5141, DTA115TE,
DTA115TM3, NSBA115TF3
Digital Transistors (BRT)
R1 = 100 kW, R2 =
8
kW
PNP Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a base−
emitter resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space.
Features
PIN 1
BASE
(INPUT)
www.onsemi.com
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
MARKING DIAGRAMS
SC−59
CASE 318D
STYLE 1
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC-Q101 Qualified
and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current
Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
40
5
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
XX MG
G
1
XXX MG
G
1
XX MG
G
1
XX M
1
XX M
1
XM 1
XXX
M
G
SOT−23
CASE 318
STYLE 6
SC−70/SOT−323
CASE 419
STYLE 3
SC−75
CASE 463
STYLE 1
SOT−723
CASE 631AA
STYLE 1
SOT−1123
CASE 524AA
STYLE 1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2012
October, 2016
Rev. 3
1
Publication Order Number:
DTA115T/D

DTA115TM3T5G Related Products

DTA115TM3T5G MMUN2141LT1G
Description Bipolar Transistors - Pre-Biased PNP DIGITAL TRANSISTOR Bipolar Transistors - Pre-Biased PNP DIGITAL TRANSISTOR
Brand Name ON Semiconductor ON Semiconductor
Is it lead-free? Lead free Lead free
Maker ON Semiconductor ON Semiconductor
package instruction SMALL OUTLINE, R-PDSO-F3 HALOGEN FREE AND ROHS COMPLIANT, 318-08, TO-236, 3 PIN
Contacts 3 3
Manufacturer packaging code 631AA 318-08
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Factory Lead Time 8 weeks 5 weeks
Other features BUILT IN BIAS RESISTOR BUILT IN BIAS RESISTOR
Maximum collector current (IC) 0.1 A 0.1 A
Collector-emitter maximum voltage 50 V 50 V
Configuration SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE) 160 160
JESD-30 code R-PDSO-F3 R-PDSO-G3
JESD-609 code e3 e3
Humidity sensitivity level 1 1
Number of components 1 1
Number of terminals 3 3
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
Polarity/channel type PNP PNP
Maximum power dissipation(Abs) 0.6 W 0.4 W
surface mount YES YES
Terminal surface Tin (Sn) Tin (Sn)
Terminal form FLAT GULL WING
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
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