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74LVC74APW-AUJ

Description
Flip Flops Dual Dtype flip-flop positive-edgetrigger
Categorysemiconductor    logic   
File Size728KB,19 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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74LVC74APW-AUJ Overview

Flip Flops Dual Dtype flip-flop positive-edgetrigger

74LVC74APW-AUJ Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerNXP
Product CategoryFlip Flops
RoHSDetails
Number of Circuits2
Logic Family74LVC
Logic TypeD-Type Flip-Flop
Input TypeTTL
Output TypeComplementary
Propagation Delay Time15 ns
Supply Voltage - Min1.65 V
Supply Voltage - Max3.6 V
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 125 C
Mounting StyleSMD/SMT
Package / CaseTSSOP-14
PackagingCut Tape
PackagingMouseReel
PackagingReel
Number of Input Lines2
Number of Output Lines2
Factory Pack Quantity2500
Unit Weight0.004949 oz
74LVC74A
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 7 — 20 November 2012
Product data sheet
1. General description
The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs,
clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.
The set and reset are asynchronous active LOW inputs and operate independently of the
clock input. Information on the data input is transferred to the nQ output on the
LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time
prior to the LOW-to-HIGH clock transition, for predictable operation.
Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and
fall times.
2. Features and benefits
5 V tolerant inputs for interlacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C

74LVC74APW-AUJ Related Products

74LVC74APW-AUJ 74LVC74APW118 74LVC74AD-AUJ
Description Flip Flops Dual Dtype flip-flop positive-edgetrigger Flip Flops DUAL D-TYPE POSITIVE Flip Flops Dual Dtype flip-flop positive-edgetrigger
Product Attribute Attribute Value Attribute Value Attribute Value
Manufacturer NXP NXP NXP
Product Category Flip Flops Flip Flops Flip Flops
RoHS Details Details Details
Number of Circuits 2 2 2
Logic Family 74LVC LVC 74LVC
Logic Type D-Type Flip-Flop D-Type Edge Triggered Flip-Flop D-Type Flip-Flop
Input Type TTL Single-Ended TTL
Propagation Delay Time 15 ns 2.5 ns at 3.3 V 15 ns
Supply Voltage - Min 1.65 V 1.2 V 1.65 V
Supply Voltage - Max 3.6 V 3.6 V 3.6 V
Minimum Operating Temperature - 40 C - 40 C - 40 C
Maximum Operating Temperature + 125 C + 125 C + 125 C
Mounting Style SMD/SMT SMD/SMT SMD/SMT
Package / Case TSSOP-14 SOT-402 SO-14
Number of Input Lines 2 1 2
Number of Output Lines 2 1 2
Factory Pack Quantity 2500 2500 2500
Unit Weight 0.004949 oz 0.007549 oz 0.009143 oz
Output Type Complementary - Complementary
Packaging Reel Reel Reel
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