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Z8937320FSG

Description
Digital Signal Processors & Controllers - DSP, DSC 8K OTP 20 MHZ DSP WITH A/D
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size613KB,60 Pages
ManufacturerZilog, Inc.
Websitehttps://www.zilog.com/
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Z8937320FSG Overview

Digital Signal Processors & Controllers - DSP, DSC 8K OTP 20 MHZ DSP WITH A/D

Z8937320FSG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Parts packaging codeQFP
package instructionQFP,
Contacts80
Reach Compliance Codeunknown
Address bus width3
barrel shifterYES
boundary scanNO
maximum clock frequency20 MHz
External data bus width16
FormatFIXED POINT
Internal bus architectureMULTIPLE
JESD-30 codeR-PQFP-G80
length20 mm
low power modeYES
Number of terminals80
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height3.1 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
uPs/uCs/peripheral integrated circuit typeDIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches1
P
RODUCT
S
PECIFICATION
Z89223/273/323/373
16-B
IT
D
IGITAL
S
IGNAL
P
ROCESSORS
WITH
A/D C
ONVERTER
FEATURES
Device
Z89223
Z89273
Z89323
Z89373
Package
44-PLCC, 44-PQFP
44-PLCC
64-TQFP, 68-PLCC, 80-PQFP
64-TQFP, 68-PLCC, 80-PQFP
ROM
(Kwords)
8
8
8
8
OTP
(Kwords)
Data RAM
(Words)
512
512
512
512
MIPS
20
20
20
20
Operating Range
On-Chip Peripherals
5V ±10%
0°C to 70°C Standard Temperature
–40°C to +85°C Extended Temperature
4-Channel, 8-Bit Half-Flash A/D Converter
Serial Peripheral Interface (SPI)
Three General-Purpose Counter/Timers
– Two Pulse Width Modulators (PWM)
– Two Watch-Dog Timers (WDT)
Up to 40 Bits of I/O
PLL System Clock
Three Vectored Interrupts Servicing Eight Sources
Low Power Clock Modes with Wake-up Options
DSP Core
16-Bit Fixed Point DSP, 24-Bit ALU and Accumulator
Single-Cycle Multiply and ALU Operations
Six-Level Hardware Stack
Six Data RAM Pointers and Sixteen Program Memory
Pointers
RISC Processor with 30 Instruction Types
GENERAL DESCRIPTION
The Z893x3 products are high-performance Digital Signal
Processors (DSP) with a modified Harvard architecture fea-
turing separate program and dual data memory banks. The
design is optimized for processing power with a minimum
of silicon area.
The Z893x3 16/24-Bit architecture accommodates ad-
vanced signal processing algorithms. The operating perfor-
mance and efficient architecture provide deterministic in-
struction execution. Compression, filtering, frequency
detection, audio, voice detection, speech synthesis, and oth-
er vital algorithms can all be implemented.
DS000202-DSP0599
Six data RAM pointers provide circular buffer capabilities
and simultaneous dual operand fetching. Three vectored in-
terrupts are complemented by a six-level stack.
By integrating a high-speed 4-channel, 8-bit A/D, SPI, three
Counter/Timers with PWM and WDT support, and up to 40
bits of I/O, the Z893x3 family provides a compact low-cost
system solution.
To support a wide variety of development requirements, the
Z893x3 DSP product family features the cost-effective
Z89223/323 with 8 KWords of ROM. The Z89273/373, an
1

Z8937320FSG Related Products

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Description Digital Signal Processors & Controllers - DSP, DSC 8K OTP 20 MHZ DSP WITH A/D Digital Signal Processors & Controllers - DSP, DSC 8K OTP 20 MHZ DSP WITH A/D Digital Signal Processors & Controllers - DSP, DSC 8K OTP 20 MHZ 16-BIT DSP WITH A/D
Is it lead-free? Lead free Lead free Lead free
Parts packaging code QFP LCC LCC
package instruction QFP, QCCJ, QCCJ,
Contacts 80 68 44
Reach Compliance Code unknown unknown unknown
Address bus width 3 3 3
barrel shifter YES YES YES
boundary scan NO NO NO
maximum clock frequency 20 MHz 20 MHz 20 MHz
External data bus width 16 16 16
Format FIXED POINT FIXED POINT FIXED POINT
Internal bus architecture MULTIPLE MULTIPLE MULTIPLE
JESD-30 code R-PQFP-G80 S-PQCC-J68 S-PQCC-J44
length 20 mm 24.2316 mm 16.5862 mm
low power mode YES YES YES
Number of terminals 80 68 44
Maximum operating temperature 70 °C 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QFP QCCJ QCCJ
Package shape RECTANGULAR SQUARE SQUARE
Package form FLATPACK CHIP CARRIER CHIP CARRIER
Peak Reflow Temperature (Celsius) NOT SPECIFIED 260 NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 3.1 mm 4.57 mm 4.57 mm
Maximum supply voltage 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form GULL WING J BEND J BEND
Terminal pitch 0.8 mm 1.27 mm 1.27 mm
Terminal location QUAD QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED 40 NOT SPECIFIED
width 14 mm 24.2316 mm 16.5862 mm
uPs/uCs/peripheral integrated circuit type DIGITAL SIGNAL PROCESSOR, OTHER DIGITAL SIGNAL PROCESSOR, OTHER DIGITAL SIGNAL PROCESSOR, OTHER
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Index Files: 2013  1169  1949  2427  2582  41  24  40  49  52 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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