19-4139; Rev 1; 8/08
Overvoltage-Protection Controllers
with a Low R
ON
Internal FET
General Description
The MAX4970/MAX4971/MAX4972 family of overvolt-
age protection devices features a low 40mΩ (typ) R
ON
internal FET and protect low-voltage systems against
voltage faults up to +28V. These devices also drive an
optional external pFET to protect against reverse-polari-
ty input voltages. When the input voltage exceeds the
overvoltage threshold, the internal FET is turned off to
prevent damage to the protected components.
All switches feature a 2.3A (min) current-limit protec-
tion. During a short-circuit occurrence, the device oper-
ates in an autoretry mode where the internal MOSFET is
turned on to check if the fault has been removed. The
autoretry interval time is 15ms, and if the fault is
removed, the MOSFET remains on.
The MAX4970/MAX4971/MAX4972 feature an enable
input (EN) that controls the operation of the internal
nFET as well as the optional external pFET. The use of
EN
allows the external pFET to block reverse voltages
independent of any signal present at the output.
The overvoltage thresholds (OVLO) are preset to
4.65V (MAX4972), 5.8V (MAX4970), or 6.35V (MAX4971).
The undervoltage thresholds (UVLO) are preset to 2.45V.
When the input voltage drops below the UVLO, the
devices enter a low-current standby mode.
All devices are offered in a small 12-bump, WLP pack-
age and operate over the -40°C to +85°C extended
temperature range.
Features
♦
Input Voltage Protection up to +28V
♦
Integrated nFET Switch
♦
Reverse Voltage Protection with External pFET
♦
Enable Input
♦
Preset Overvoltage Protection Trip Level
5.8V (MAX4970)
6.35V (MAX4971)
4.65V (MAX4972)
♦
Low-Current Undervoltage-Lockout Mode
♦
Short-Circuit Protection (Autoretry)
♦
Internal 15ms Startup Delay and Retry Times
♦
Input-Voltage Power-Good Logic Output
♦
Thermal-Shutdown Protection
♦
2mm x 1.5mm, 12-Bump WLP Package
MAX4970/MAX4971/MAX4972
Pin Configuration
TOP VIEW
(BUMPS ON BOTTOM)
1
2
3
4
MAX4970/MAX4971/MAX4972
A
ACOK
B
GND
C
EN
IN
IN
IN
OUT
IN
GP
OUT
OUT
OUT
Applications
Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3 Players
WLP
Ordering Information/Selector Guide
PART
MAX4970EWC+T
MAX4971EWC+T
MAX4972EWC+T
PIN-PACKAGE
12 WLP
12 WLP
12 WLP
TOP MARK
AAA
AAB
AAC
PACKAGE CODE
W121A2+1
W121A2+1
W121A2+1
UVLO (V)
2.45
2.45
2.45
OVLO (V)
5.8
6.35
4.65
ACOK
ACTION
UVLO only
UVLO only
UVLO and OVLO
Note:
All devices are specified over the -40°C to +85°C operating temperature range.
+Denotes
a lead-free/RoHS-compliant package.
T
= Tape-and-reel package.
Typical Operating Circuit appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Overvoltage-Protection Controllers
with a Low R
ON
Internal FET
MAX4970/MAX4971/MAX4972
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND.)
IN ............................................................................-0.3V to +30V
IN-GP.........................................................................(30V - 5.4V)
OUT.............................................................-0.3V to +(IN + 0.3)V
EN, ACOK.................................................................-0.3V
to +6V
GP...........................................................................-0.3V to +30V
Continuous Power Dissipation (T
A
= +70°C) for
Multilayer Board:
12-Bump WLP (derate 8.5mW/°C above +70°C).....678mW
WLP Package Junction-to-Ambient Thermal
Resistance (θ
JA
) (Note 1)...........................................118°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering) .........................................+300°C
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
IN
= +2.2V to +28V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
Input Voltage Range
SYMBOL
V
IN
EN
= 0V
V
IN
= 12V; GP clamp on
Input Supply Current
I
IN
EN
= 0V
V
IN
= 5V (MAX4970),
V
IN
= 5.5V (MAX4971),
V
IN
= 3.8V (MAX4972)
EN
= 1.4V
UVLO Supply Current
IN Undervoltage Lockout
IN Undervoltage Lockout Hysteresis
MAX4970
V
IN
rising
Overvoltage Trip Level
V
OVLO
V
IN
falling
IN Overvoltage Lockout Hysteresis
MAX4971
MAX4972
MAX4970
MAX4971
MAX4972
5.6
6.0
4.35
5.50
6.00
4.30
I
UVLO
V
UVLO
V
IN
< V
UVLO
; V
IN
= 2.2V
V
IN
falling
V
IN
rising
2.20
2.25
2.45
2.5
1
5.9
6.4
4.70
5.80
6.35
4.65
1
6.2
6.8
5.05
6.15
6.70
5.00
%
V
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
50
60
CONDITIONS
MIN
2.2
176
TYP
MAX
28
230
250
107
150
100
40
2.65
2.7
µA
V
%
µA
UNITS
V
2
_______________________________________________________________________________________
Overvoltage-Protection Controllers
with a Low R
ON
Internal FET
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +2.2V to +28V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
Switch On-Resistance
SYMBOL
R
ON
CONDITIONS
V
IN
= 5V (MAX4970),
V
IN
= 5.5V (MAX4971),
V
IN
= 3.8V (MAX4972); I
OUT
= 400mA
V
IN
= 5V (MAX4970),
V
IN
= 5.5V (MAX4971),
V
IN
= 3.8V (MAX4972)
V
IN
- V
GP
, V
IN
up to 28V
EN
= low,
V
GP
= V
IN
= 5V (MAX4970),
V
GP
= V
IN
= 5.5V (MAX4971),
V
GP
= V
IN
= 3.8V (MAX4972)
EN
= high, V
IN
= 5V
2.30
5.4
MIN
TYP
40
MAX
90
UNITS
mΩ
MAX4970/MAX4971/MAX4972
Overcurrent Protection Threshold
GP Clamp Voltage
I
LIM
V
GPC
3.36
7.0
8.5
A
V
GP Pulldown Resistor
R
GPPD
16
36
54
kΩ
GP Pullup Resistor to IN
EN
Input-Voltage High
EN
Input-Voltage Low
EN
Input Leakage Current
ACOK
Output-Low Voltage
ACOK
High Leakage Current
Thermal Shutdown
Thermal-Shutdown Hysteresis
Maximum Output Capacitance
R
GPPU
V
IH
V
IL
I
EN
V
OL
9
1.4
15
25
0.4
kΩ
V
V
µA
V
µA
°C
°C
V
EN
= 5V
I
SINK
= 1mA
V
ACOK
= 5.5V,
ACOK
deasserted
+150
40
1
0.4
1
C
OUT
Time from V
UVLO
< V
IN
< V
OVLO
, R
LOAD
=
100Ω, C
LOAD
= 1µF to charge-pump enable
V
UVLO
< V
IN
< V
OVLO
, R
LOAD
= 100Ω,
C
LOAD
= 1µF from
EN
low to 90% of V
OUT
V
UVLO
< V
IN
to
ACOK
low (MAX4970/MAX4971)
V
UVLO
< V
IN
< V
OVLO
to
ACOK
low (MAX4972)
V
IN
< V
UVLO
to internal switch off
V
IN
> V
OVLO
to internal switch off,
R
LOAD
= 100Ω
Overcurrent fault to internal switch off
From overcurrent fault to internal switch
turn-on, Figure 2
1000
µF
TIMING CHARACTERISTICS (Figure 1)
Debounce Time
Switch Turn-On Time
ACOK
Assertion Time
t
INDBC
t
ON
t
ACOK
15
13
15
4
5
10
15
8
11
µs
µs
ms
ms
ms
ms
Switch Turn-Off Time
Current Limit Turn-Off Time
Autoretry Time
t
OFF
t
BLANK
t
RETRY
Note 2:
All specifications are 100% production tested at T
A
= +25°C, unless otherwise noted. Specifications are over -40°C to +85°C
and are guaranteed by design.
_______________________________________________________________________________________
3
Overvoltage-Protection Controllers
with a Low R
ON
Internal FET
MAX4970/MAX4971/MAX4972
Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX4970/71/72 toc01
R
ON
vs. TEMPERATURE
AX4970/71/72 toc02
NORMALIZED UVLO THRESHOLD
vs. TEMPERATURE
1.008
NORMALIZED UVLO THRESHOLD
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
AX4970/71/72 toc03
250
229
208
187
CURRENT (µA)
166
145
124
103
82
61
40
19
0
7
14
VOLTAGE (V)
21
80
1.010
64
R
ON
(mΩ)
48
32
16
0
28
-40
-15
10
35
60
85
TEMPERATURE (°C)
0.990
-40
-15
10
35
60
85
TEMPERATURE (°C)
NORMALIZED OVLO THRESHOLD
vs. TEMPERATURE
MAX4970/1/2 toc04
CURRENT LIMIT
vs. TEMPERATURE
MAX4970/1/2 toc05
NORMALIZED ACOK ASSERTION TIME
vs. TEMPERATURE
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
-40
-15
10
35
60
85
MAX4970/71/72 toc06
1.010
1.008
NORMALIZED OVLO THRESHOLD
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990
-40
-15
10
35
60
4.00
1.05
NORMALIZED ACOK ASSERTION TIME
3.75
CURRENT LIMIT (A)
3.50
3.25
3.00
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
NORMALIZED DEBOUNCE TIME
vs. TEMPERATURE
1.04
NORMALIZED DEBOUNCE TIME
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
-40
-15
10
35
60
85
MAX4970/71/72 toc07
POWER-UP RESPONSE
AX4970/71/72 toc08
OVERVOLTAGE FAULT RESPONSE
MAX4970/71/72 toc09
1.05
8V
V
IN
5V/div
V
OUT
5V/div
V
ACOK
5V/div
I
OUT
1A/div
10ms/div
20μs/div
3V
V
IN
5V/div
V
OUT
5V/div
V
ACOK
5V/div
I
OUT
500mA/div
TEMPERATURE (°C)
4
_______________________________________________________________________________________
Overvoltage-Protection Controllers
with a Low R
ON
Internal FET
Typical Operating Characteristics (continued)
(T
A
= +25°C, unless otherwise noted.)
OVERCURRENT DURATION TIME
(DURING AUTORETRY)
MAX4970/71/72 toc12
MAX4970/MAX4971/MAX4972
UNDERVOLTAGE FAULT RESPONSE
MAX4970/71/72 toc10
SHORT-CIRCUIT FAULT RESPONSE
MAX4970/71/72 toc11
R
LOAD
= 1Ω
C
LOAD
= 0.1µF
4V
V
IN
5V/div
V
OUT
5V/div
V
ACOK
5V/div
I
OUT
1A/div
4ms/div
4µs/div
V
IN
5V/div
V
OUT
5V/div
V
ACOK
5V/div
I
OUT
1A/div
I
OUT
10A/div
4ms/div
V
OUT
2V/div
Pin Description
PIN
NAME
ACOK
FUNCTION
Active-Low Open-Drain Adapter-Voltage Indicator Output.
ACOK
is driven low after the adapter
voltage is stable between UVLO and OVLO for 15ms (typ) (MAX4972), or after the adapter voltage
is stable and greater than UVLO for 15ms (typ) (MAX4970/MAX4971). Connect a pullup resistor
from
ACOK
to the logic I/O voltage of the host system.
Output Voltage. Output of the internal switch. Connect all the OUT outputs together for proper
operation.
Ground
Voltage Input. Bypass IN with a 1µF ceramic capacitor as close as possible to the device to
obtain ±15kV Human Body Model (HBM) ESD protection. No capacitor is required for ±2kV (HBM)
ESD protection. Connect all the IN inputs together for proper operation.
External pFET Gate-Drive Output. GP pulls the external pFET gate down when the input is above
UVLO and when
EN
is active (low).
Enable Input. Drive
EN
low to turn GP pulldown on, GP pullup off, and to turn on the charge pump.
Drive
EN
high to turn off the device.
A1
A2, A3,
A4, B2
B1
B3, C2,
C3, C4
B4
C1
OUT
GND
IN
GP
EN
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