BLP8G21S-160PV
Power LDMOS transistor
Rev. 5 — 28 September 2015
Product data sheet
1. Product profile
1.1 General description
160 W LDMOS transistor for base station applications at frequencies from 1880 MHz to
2025 MHz.
Table 1.
Typical performance
Typical RF performance per section at T
case
= 25
C in a common source class-AB production test
circuit.
Test signal
2-carrier W-CDMA
[1]
f
(MHz)
1880 to 1920
I
Dq
(mA)
600
V
DS
(V)
28
P
L(AV)
(W)
20
G
p
(dB)
17.5
D
(%)
31
ACPR
(dBc)
30
[1]
Test signal: 3GPP test model 1; 64 DPCH; PAR = 8.4 dB at 0.01 % probability on CCDF;
carrier spacing = 5 MHz.
1.2 Features and benefits
Designed for broadband operation (1880 MHz to 2025 MHz)
Decoupling leads to enable improved video bandwidth
Excellent ruggedness
High efficiency
Excellent thermal stability
Internally matched for ease of use
High power gain
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for base station and multi-carrier applications in the 1880 MHz to
2025 MHz frequency range
BLP8G21S-160PV
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1, 2
3, 6
4, 5
7
Pinning
Description
gate
decoupling lead
drain
source
[1]
Simplified outline
6
5
4
3
Graphic symbol
4
3
2
7
1
1
2
6
5
aaa-008888
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name
Description
Version
SOT1221-2
Type number
BLP8G21S-160PV HSOP6F plastic, heatsink small outline package; 6 leads (flat)
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
[1]
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
65
[1]
Max
65
+13
+150
225
Unit
V
V
C
C
-
Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF
calculator.
5. Thermal characteristics
Table 5.
Symbol
Thermal characteristics
Parameter
Conditions
T
case
= 80
C;
P
L
= 80 W
Typ
Unit
0.356 K/W
R
th(j-case)
thermal resistance from junction to case
BLP8G21S-160PV
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet
Rev. 5 — 28 September 2015
2 of 11
BLP8G21S-160PV
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C per section, unless otherwise specified.
Symbol Parameter
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
Conditions
V
DS
= 10 V; I
D
= 114 mA
V
DS
= 28 V; I
D
= 684 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 114 mA
Min
65
1.5
1.7
-
-
-
-
-
Typ
-
1.9
2.1
-
20.4
-
1.0
0.1
Max
-
2.3
2.5
1.4
-
140
-
-
Unit
V
V
V
A
A
nA
S
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 1.14 mA
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 3.99 A
Table 7.
RF characteristics
Test signal: 2-carrier W-CDMA; PAR = 8.4 dB at 0.01 % probability on CCDF;
carrier spacing = 5 MHz; 3GPP test model 1; 64 DPCH; f
1
= 1882.5 MHz; f
2
= 1887.5 MHz;
f
3
= 1912.5 MHz; f
4
= 1917.5 MHz; RF performance per section at V
DS
= 28 V; I
Dq
= 600 mA;
T
case
= 25
C; unless otherwise specified; in a class-AB production test circuit.
Symbol
G
p
D
RL
in
ACPR
Parameter
power gain
drain efficiency
input return loss
adjacent channel power ratio
Conditions
P
L(AV)
= 20 W
P
L(AV)
= 20 W
P
L(AV)
= 20 W
P
L(AV)
= 20 W
Min
16.3
26
-
-
Typ
17.5
31
10
30
Max
-
-
6
25
Unit
dB
%
dB
dBc
7. Application information
7.1 Ruggedness in class-AB operation
The BLP8G21S-160PV is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: per section; V
DS
= 28 V;
I
Dq
= 600 mA; P
L
= 80 W (CW); f = 1880 MHz.
7.2 Impedance information
Table 8.
Typical impedance
Measured per section load-pull data; I
Dq
= 600 mA; V
DS
= 28 V. Typical values unless otherwise
specified.
f
(MHz)
1880
1920
2025
[1]
Z
S
[1]
()
2.353
j8.430
3.032
j9.435
6.435
j13.55
Z
L
[1]
()
2.508
j8.375
2.407
j8.091
2.148
j7.389
Z
S
and Z
L
defined in
Figure 1.
BLP8G21S-160PV
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet
Rev. 5 — 28 September 2015
3 of 11
BLP8G21S-160PV
Power LDMOS transistor
drain
Z
L
gate
Z
S
001aaf059
Fig 1.
Definition of transistor impedance
7.3 Test circuit
110.4 mm
C4
C1
C2
R1
C3
C1
C2
C1
C3
C1
60 mm
C1
C2
R1
C1
C3
C1
C1
C2
C3
C4
aaa-010369
Printed-Circuit Board (PCB): Rogers RO4350B; thickness = 0.76 mm.
See
Table 9
for list of components.
Fig 2.
Component layout for test circuit
Table 9.
List of components
For test circuit, see
Figure 2.
Component
C1
C2
C3
C4
R1
Description
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
electrolytic capacitor
chip resistor
Value
30 pF
2.2
F
10
F
1000
F,
63 V
5.1
Vishay Dale SMD 0805
Remarks
ATC800B
Murata
Murata
BLP8G21S-160PV
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2016. All rights reserved.
Product data sheet
Rev. 5 — 28 September 2015
4 of 11
BLP8G21S-160PV
Power LDMOS transistor
7.4 Graphical data
7.4.1 Pulsed CW
aaa-010401
aaa-010402
19
G
p
(dB)
18
G
p
60
η
D
(%)
50
RL
in
(dB)
5
0
17
(1)
(1)
(2)
(2)
40
-5
16
30
-10
(2)
15
η
D
20
-15
(1)
14
10
-20
13
0
20
40
60
80
P
L
(W)
0
100
-25
0
20
40
60
80
P
L
(W)
100
V
DS
= 28 V; I
Dq
= 600 mA.
(1) f = 1880 MHz
(2) f = 1920 MHz
V
DS
= 28 V; I
Dq
= 600 mA.
(1) f = 1880 MHz
(2) f = 1920 MHz
Fig 3.
Power gain and drain efficiency as function of
output power; typical values per section
Fig 4.
Input return loss as a function of output
power; typical values per section
7.4.2 CW
aaa-010403
aaa-010404
19
G
p
(dB)
18
G
p
60
η
D
(%)
50
RL
in
(dB)
-4
-8
17
(1)
(1)
(2)
(2)
40
16
30
-12
(1)
15
η
D
20
-16
(2)
14
10
13
0
20
40
60
80
P
L
(W)
0
100
-20
0
10
20
30
40
50
60
70
P
L
(W)
80
V
DS
= 28 V; I
Dq
= 600 mA.
(1) f = 1880 MHz
(2) f = 1920 MHz
V
DS
= 28 V; I
Dq
= 600 mA.
(1) f = 1880 MHz
(2) f = 1920 MHz
Fig 5.
Power gain and drain efficiency as function of
output power; typical values per section
Fig 6.
Input return loss as a function of output
power; typical values per section
© Ampleon Netherlands B.V. 2016. All rights reserved.
BLP8G21S-160PV
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 5 — 28 September 2015
5 of 11
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