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8SLVP1204ANLGI8

Description
Clock Drivers & Distribution 2:4 LVPECL Output Fanout Buffer
Categorysemiconductor    Analog mixed-signal IC   
File Size469KB,25 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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8SLVP1204ANLGI8 Overview

Clock Drivers & Distribution 2:4 LVPECL Output Fanout Buffer

8SLVP1204ANLGI8 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerIDT (Integrated Device Technology, Inc.)
Product CategoryClock Drivers & Distribution
RoHSDetails
Mounting StyleSMD/SMT
Package / CaseVFQFPN-16
PackagingCut Tape
PackagingMouseReel
PackagingReel
Height1 mm
Length3 mm
Width3 mm
Moisture SensitiveYes
Factory Pack Quantity2500
Low Phase Noise, 2:4, 3.3V, 2.5V
LVPECL Output Fanout Buffer
8SLVP1204
DATA SHEET
General Description
The 8SLVP1204 is a high-performance differential LVPECL fanout
buffer. The device is designed for the fanout of high-frequency, very
low additive phase-noise clock and data signals. The 8SLVP1204 is
characterized to operate from a 3.3V or 2.5V power supply.
Guaranteed output-to-output and part-to-part skew characteristics
make the 8SLVP1204 ideal for those clock distribution applications
demanding well-defined performance and repeatability. Two
selectable differential inputs and four low skew outputs are available.
The integrated bias voltage reference enables easy interfacing of
single-ended signals to the device inputs. The device is optimized for
low power consumption and low additive phase noise.
Features
Four low skew, low additive jitter LVPECL output pairs
Two selectable, differential clock input pairs
Differential PCLKx pairs can accept the following differential input
levels: LVDS, LVPECL, CML
Differential PCLKx pairs can also accept single-ended LVCMOS
levels. See
Section, “Applications Information”,
section,
“Wiring
the Differential Input to Accept Single-Ended Levels”
(Figures 1A
and 1B)
Maximum input clock frequency: 2GHz
LVCMOS interface levels for the control input, (input select)
Output skew: 5ps (typical), at 3.63V
Propagation delay: 200ps (typical), at 3.63V
Low additive phase jitter, RMS; f
REF
= 156.25MHz, V
PP
= 1V,
12kHz - 20MHz: 40fs (maximum), at 3.63V
Maximum device current consumption (I
EE
): 60mA (maximum),
at 3.63V
Full 3.3V±5%, 3.3V±10% or 2.5V±5% supply
Lead-free (RoHS 6), 16-Lead VFQFN packaging
-40°C to 85°C ambient operating temperature
Supports case temperature
105°C operations
Block Diagram
V
CC
Pin Assignment
nQ3
nQ2
Q3
Q2
PCLK0
nPCLK0
Pulldown
Pullup/Pulldown
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
V
EE
1
SEL
2
16 15 14 13
12 nQ1
11 Q1
10 nQ0
9 Q0
5
V
CC
PCLK1 3
nPCLK1 4
6
PCLK0
0
1
f
REF
7
nPCLK0
8
V
REF
V
CC
PCLK1
nPCLK1
Pulldown
Pullup/Pulldown
8SLVP1204
16-Lead, 3mm x 3mm VFQFN Package
SEL
V
REF
Pulldown
Voltage
Reference
8SLVP1204 REVISION D 6/8/15
1
©2015 Integrated Device Technology, Inc.

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Description Clock Drivers & Distribution 2:4 LVPECL Output Fanout Buffer Clock Drivers & Distribution 2:4 LVPECL Output Fanout Buffer
Product Attribute Attribute Value Attribute Value
Manufacturer IDT (Integrated Device Technology, Inc.) IDT (Integrated Device Technology, Inc.)
Product Category Clock Drivers & Distribution Clock Drivers & Distribution
RoHS Details Details
Moisture Sensitive Yes Yes
Factory Pack Quantity 2500 2500
Packaging Reel Reel
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