UPB587B*
1.0 GHz DIVIDE- BY- 2/4/8 PRESCALER UPB587G
*
B VERSION FOR HI-REL
APPLICATIONS ONLY
FEATURES
• HIGH FREQUENCY OPERATION TO 1 GHz
• LOW SUPPLY VOLTAGE:
2.2 V to 3.5 V
TEST CIRCUIT
V
CC
C
C
• LOW SUPPLY CURRENT:
5.5 mA
• AVAILABLE IN TAPE AND REEL
(G08 PACKAGE)
INPUT
C
C
1
2
3
4
8
C
7
M
2
6
C
5
C
C = 2200 pF
M
1
Re*
OUTPUT
Ro*
DESCRIPTION
The UPB587 series of devices are silicon bipolar digital
prescalers which can be operated in divide-by-two, divide-by-
four or divide-by-eight mode. They feature frequency re-
sponse to 1 GHz, and operate from a single 3 volt supply
drawing only 5.5 milliamps. The series is available in two
package styles: 8 lead ceramic flat pack (UPB587B), and an
8 pin plastic mini-flat package (UPB587G). Applications in-
clude: synthesizer for DBS receiver and telecommunication
applications. The low DC voltage required and power-saving
current draw make them ideal for hand-held, battery-powered
applications.
*
Re and Ro used on test circuit as indicated below.
BLOCK DIAGRAM
V
CC
1
1
V
CC
2
8
IN
BYPASS
2
3
AMP
1/2
1/2
1/2
BUF
7
OUT
5
M1
6
M2
4
GND
ELECTRICAL CHARACTERISTICS
1
(T
A
= -20 to +75°C, V
CC
= 2.2 to 3.5 V)
PART NUMBER
PACKAGE OUTLINE
SYMBOLS
I
CC
f
IN
PARAMETERS AND CONDITIONS
Supply Current
Frequency Response at P
IN
= -20 to 0 dBm,
Divide-by-eight
Divide-by-four
Divide-by-two
P
IN
= -18 to 0 dBm,
Divide-by-eight
Divide-by-four
Divide-by-two
Input Power at:
f
IN
= 50 to 100 MHz
f
IN
= 100 to 300 MHz, Divide-by-two
f
IN
= 100 to 600 MHz, Ddivide-by-four
f
IN
= 100 to 1000 MHz, Divide-by-eight
UNITS
mA
MHz
MHz
MHz
MHz
MHz
MHz
dBm
dBm
dBm
dBm
V
P-P
°C/W
°C/W
100
100
100
50
50
50
-18
-20
-20
-20
0.1
0.3
50
270
MIN
UPB587B, UPB587G
BF08, G08
TYP
5.5
MAX
7.5
1000
600
300
1000
600
300
0
0
0
0
P
IN
V
O
R
TH (J-C)
R
TH (J-A)
Output Voltage, at f
IN
= 0.5 GHz, P
IN
= -10 dBm, Z
O
= 200
Ω
Thermal Resistance, Junction to Case
(UPB587B)
Thermal Resistance, Junction to Ambient
(UPB587G)
2
Notes:
1. V
CC1
= 2.2 V to 3.5 V, V
CC2
= 2.2 to 3.5 V.
2. Mounted on a 5 x 5 x 0.16 mm epoxy glass circuit board.
3. To improve impedance match to a 50
Ω
load, a 1.2 KΩ shunt resistor on the output line is recommended.
California Eastern Laboratories
UPB587B, UPB587G
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C)
SYMBOLS
PARAMETERS
UNITS
V
V
dBm
W
mW
°C
°C
°C
°C
RATINGS
-0.5 to 4.0
-0.5 to V
CC
+ 0.5
+10
1.5 (T
A
= +125°C)
250 (T
A
= +85°C)
-55 to +125
-40 to +85
-65 to +200
-65 to +150
V
CC1,
V
CC2
Supply Voltage
V
IN,
V
M
P
IN
P
T
Input Voltage,
Ratio Control Voltage
Input Power
Power Dissipation
UPB587B
UPB587G
Operating Temperature
UPB587B
UPB587G
Storage Temperature
UPB587B
UPB587G
RECOMMENDED
OPERATING CONDITIONS
SYMBOL
V
CC1,
V
CC2
T
OP
PARAMETER
Supply Voltage
Operating Temperature
UNITS
V
°C
RATINGS
2.2 to 3.5
-20 to +75
T
OP
T
STG
Note:
1. Operation in excess of any one of these parameters may result in
permanent damage.
Note: Because of the high internal gain and gain compression of the
UPB587, this device is prone to self-oscillation in the absence of an RF
input signal. If the device will be used in an application where DC power
will be applied in the absence of an RF input signal, this self-oscillation
can be suppressed by any of the following means:
*
Add a shunt resistor from the RF input line to ground. The
blocking capacitor should be between the resistor and the
UPB587, but physical separation should be minimized. Typically a
resistor value between 50 and 100 ohms will suppress the self-
oscillation.
*
Apply a DC offset voltage of +2.0 volts to the INPUT pin. The
voltage source should be isolated from the INPUT pin by a series
1000 ohm resistor.
*
Apply a DC offset voltage of +1.0 volts to the BYPASS pin. The
voltage source should be isolated from the BYPASS pin by a
series 1000 ohm resistor.
All these approaches reduce the input sensitivity of the UPB587 (by as
much as 3 dB for the example of a 50 ohm shunt resistor), but otherwise
have no affect on the reliability or other electrical characteristics of this
device.
TYPICAL PERFORMANCE CURVES
(T
A
= 25°C unless otherwise noted)
FREQUENCY RESPONSE
(DIVIDE-BY-2 @ T
A
= 25
°
C)
+10
FREQUENCY RESPONSE
(DIVIDE-BY-2 @ V
CC
= 2.2 V)
*
Guaranteed
Input Power, P
IN
(dBm)
G*
O
W
10
0
Input Power, P
IN
(dBm)
-10
-20
-30
V
CC
= 2.2 V
3.0 V
3.5 V
Operating
Window
0
-10
-20
-30
-40
-50
-60
G*
O
W
T
A
= +75˚C
+25˚C
-20˚C
-40
-50
-60
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Frequency, f (GHz)
FREQUENCY RESPONSE
(DIVIDE-BY-4 @ T
A
= 25
°
C)
+10
0
+10
Frequency, f (GHz)
FREQUENCY RESPONSE
(DIVIDE-BY-4 @ V
CC
= 2.2 V)
0
Input Power, P
IN
(dBm)
-10
-20
-30
-40
G
*
O
W
Input Power, P
IN
(dBm)
V
CC
= 2.2 V
3.0 V
3.5 V
-10
-20
-30
-40
-50
-60
G
*
O
W
TA = +75˚C
+25˚C
-20˚C
-50
-60
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Frequency, f (GHz)
Frequency, f (GHz)
UPB587B, UPB587G
TYPICAL PERFORMANCE CURVES
FREQUENCY RESPONSE
(DIVIDE-BY-8 @ T
A
= 25
°
C)
+10
+10
FREQUENCY RESPONSE
(DIVIDE-BY-8 @ V
CC
= 2.2 V)
0
0
Input Power, P
IN
(dBm
Input Power, P
IN
(dBm)
-10
-20
Guaranteed
Operating
Window
-10
Guaranteed
Operating
Window
-20
T
A
= +75˚C
+25˚C
-20˚C
-30
-40
-50
-60
0
0.2
0.4
V
CC
= 2.2 V
3.0 V
3.5 V
-30
-40
-50
-60
0.6
0.8
1.0
1.2
1.4
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Frequency, f (GHz)
Frequency, f (GHz)
UPB587G
OUTPUT LEVEL vs.
FREQUENCY AND Re
2.0
UPB587G
OUTPUT LEVEL vs.
FREQUENCY & SUPPLY VOLTAGE
T
A
= 25°C
P
IN
= -20 dBm
V
CC1
= 3.0 V
V
CC2
= 3.0 V
Division Ratio = 1/8
Ro = 200
Ω
T
A
= 25°C
P
IN
= -20 dBm
V
CC1
= V
CC2
Division Ratio = 1/8
Re = 3.3 K
Ω
Ro = 200
Ω
1.0
3.5V
Output Level (Vpp)
1.0
1
2
3
4
5
6
0
0
500
1000
1500
Output Level (Vpp)
1.
2.
3.
4.
5.
6.
Re = 680
Ω
Re = 910
Ω
Re = 1.3 K
Ω
Re = 2.2 K
Ω
Re = 3.3 K
Ω
Re = Open
Ro = Open
3.0V
0.5
2.5V
2.0V
0
0
500
1000
1500
Input Frequency (MHz)
Input Frequency (MHz)
UPB587G
OUTPUT LEVEL vs.
FREQUENCY & DIVISION RATIO
1.0
SSB PHASE NOISE vs.
OFFSET FROM CARRIER
f
IN
- 1 GHz, T
A
= 25
°
C
T
A
= 25°C
P
IN
= -20 dBm
V
CC1
= 3.0 V
V
CC2
= 3.0 V
Re = 3.3 K
Ω
Ro = 200
Ω
-50
Divide by eight mode
-60
SSB Phase Noise (dBc/Hz)
-70
-80
-90
-100
-110
-120
-130
-140
Output Level (Vpp)
1/8
0.5
1/2
1/4
0
0
500
1000
1500
-150
10
100
1K
10K
100K
Input Frequency (MHz)
Offset from Carrier (Hz)
UPB587B, UPB587G
UPB587B
INPUT AND OUTPUT S-PARAMETERS
V
CC
= 3.5 V, I
CC
= 5.5 mA, Z
S
= Z
L
= 50
Ω
DIVIDE-BY-2 MODE
Frequency
(MHz)
100
200
300
400
500
100
200
300
400
500
600
700
800
100
200
300
400
500
600
700
800
900
1000
MAG
0.039
0.052
0.069
0.087
0.103
0.039
0.052
0.069
0.086
0.102
0.119
0.135
0.150
0.039
0.052
0.069
0.086
0.102
0.119
0.135
0.150
0.164
0.181
S
11
ANG
-106
-109
-112
-115
-118
-106
-109
-112
-115
-118
-120
-123
-126
-106
-109
-112
-115
-118
-120
-123
-126
-128
-130
Frequency
(GHz)
0.10
0.20
0.30
0.40
0.50
0.10
0.20
0.30
0.40
0.50
MAG
0.597
0.619
0.623
0.634
0.636
0.606
0.626
0.644
0.660
0.665
S
22
ANG
-1
-5
-8
-14
-19
-1
-2
-6
-12
-19
UPB587G
INPUT AND OUTPUT S-PARAMETERS
Vcc = 3.5 V, Icc = 5.5 mA, Z
S
= Z
L
= 50
Ω
DIVIDE-BY-TWO MODE
*
Frequency
(MHz)
100
200
300
400
500
S
11
MAG
0.049
0.054
0.066
0.079
0.092
ANG
-107
-114
-113
-112
-111
Frequency
(GHz
100
200
300
400
500
MAG
0.331
0.451
0.480
0.517
0.548
S
22
ANG
9
22
16
15
13
DIVIDE-BY-4 MODE
DIVIDE-BY-FOUR MODE *
100
200
300
400
500
600
700
800
0.049
0.055
0.066
0.080
0.092
0.106
0.117
0.130
-107
-111
-112
-111
-110
-109
-108
-106
100
200
300
400
500
0.377
0.410
0.508
0.565
0.599
7
23
22
17
13
DIVIDE-BY-8 MODE
0.10
0.20
0.30
0.40
0.50
0.606
0.628
0.644
0.659
0.662
0
-2
-6
-13
-19
DIVIDE-BY-EIGHT MODE *
100
200
300
400
500
600
700
800
900
1000
0.049
0.054
0.066
0.078
0.091
0.105
0.117
0.128
0.143
0.155
-107
-113
-112
-111
-110
-109
-108
-106
-105
-103
100
200
300
400
500
0.392
0.433
0.518
0.569
0.597
9
21
19
15
11
* These parameters were taken with the oscillation suppression 50
Ω
resistor on the input line.
EQUIVALENT CIRCUIT
INPUT
BYPASS
V
CC1
V
CC2
GND
M1
M2
OUTPUT
UPB587B, UPB587G
OUTLINE DIMENSIONS
(Units in mm)
UPB587B
PACKAGE OUTLINE BF08
7.0±0.5
1.27 1.27 1.27
±0.1 ±0.1 ±0.1
1.7 MAX
UPB587G
PACKAGE OUTLINE G08
8
7
6
5
8
7
6
5
10.4±0.5
2.6
4.4±0.2
PIN
CONNECTION
1. V
CC1
2. Input
3. Bypass
4. GND
5. M1
6. M2
7. Output
8. V
CC2
N
587
XXX
2
3
5.70 MAX
4
PIN CONNECTION
1. V
CC
1
2.
3. Bypass
4.
5. M1
6.
7. Output
8.
Input
GND
M2
V
CC2
XXX = Lot/Date Code
1
6.5 ± 0.3
0.15 +0.10
-0.05
4.4
1.1
1.49
1.8 MAX
1
2
0.4
5.0±0.2
3
4
+0.05
0.2
-0.02
0.1 ± 0.1
1.27
+0.10
0.40 -0.05
0.6 ± 0.2
0.94 MAX
PIN DESCRIPTION
PIN NO.
1
2
3
4
SYMBOL
V
CC1
INPUT
BYPASS
GND
DESCRIPTION
Power Supply Pin of Input Amplifier
and Divider
Signal Input Pin
Input Bypass Pin, shall be connected
to ground through bypass capacitor
Ground Pin
Division Ratio Control
1
M1
M2
Division Ratio
L
L
1/8
L
H
1/4
H
H
1/2
Output Pin
Power Supply of Output Buffer
Note:
1. Control Voltages:
PIN 5 or 6
VM
WITHOUT EXTERNAL RESISTOR
MIN
HIGH
VM
LOW
0V
V
CC
- 0.3
V
CC
- 0.2 V
MAX
V
CC
+ 0.5
PIN 5 or 6
R
VM
WITH EXTERNAL RESISTOR (R = 300 kΩ)
HIGH
VM
LOW
MIN
V
CC
0V
MAX
V
CC
+ 1.1 V
V
CC
- 0.5
5
6
M1
M2
ORDERING INFORMATION
PART NUMBER
UPB587G-E1
QTY
2500/Reel
7
8
OUTPUT
V
CC2
EXCLUSIVE NORTH AMERICAN AGENT FOR
RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS
CALIFORNIA EASTERN LABORATORIES
• Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279
24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM
PRINTED IN USA ON RECYCLED PAPER -3/97
DATA SUBJECT TO CHANGE WITHOUT NOTICE