FEATURES
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LTC1705
Dual 550kHz Synchronous
Switching Regulator Controller with
5-Bit VID and 150mA LDO
DESCRIPTIO
The LTC
®
1705 is a complete power supply controller for
Intel Mobile Pentium processors. It includes two switch-
ing regulator controllers, each designed to drive a pair of
N-channel MOSFETs in a voltage mode feedback, syn-
chronous buck configuration, to provide the core and I/O
supplies. The core controller includes a 5-bit DAC that
conforms to the Intel Mobile VID specification. The IC also
includes a low dropout linear regulator (LDO) that delivers
up to 150mA of output current to provide the CLK supply.
The LTC1705 uses a constant-frequency 550kHz PWM
architecture, minimizing external component size and
cost, as well as optimizing load transient performance. It
provides better than 1.25% DC accuracy at its core output,
and 2% at I/0 and CLK outputs. The high performance
feedback loops allow the circuit to keep total output
regulation within
±5%
under all transient conditions. An
open-drain PGOOD flag indicates that all three outputs are
within
±10%
of their regulated values. A shutdown circuit
disables all three outputs if the RUN/SS pin is pulled to
ground. In this mode, the LTC1705 supply current drops
to below 100µA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Pentium is a registered trademark of Intel Corporation.
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Three Regulated Outputs: Core, I/O and CLK in One
Package
Integrated Intel Mobile 5-Bit VID DAC
No External Current Sense Resistors
All N-Channel External MOSFET Architecture
550kHz Switching Frequency Minimizes External
Component Size and Cost
Integrated 150mA LDO Linear Regulator
Excellent DC Accuracy: 1.25% for Core, 2% for I/O
and CLK Supplies
PGOOD Flag Monitors All Three Outputs
High Efficiency Over Wide Load Current Range
Low Shutdown Current: < 100µA
Switchers Run Out-of-Phase to Minimize C
IN
Small 28-Pin Narrow SSOP Package
APPLICATIO S
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Complete Power Supply Controller for Intel
Mobile Pentium
®
Processors
Intel Mobile Pentium Core, I/O, Clock Supplies
Multiple Logic Supply Generator
TYPICAL APPLICATIO
V
IN
5V
C
IN
330µF
10V
×3
Intel Mobile Pentium VRM Supply
D
CPC
MBR
0520LT1
QTCB
R
PGOOD
5k
2
PV
CC
5
TGC
3
BOOSTC
6
4
R
IMAXC
, 27k
8
13
11
SWC
BGC
I
MAXC
SENSEC
FBC
COMPC
RUN/SS
PGND
GND
VID4:0
V
OUTCLK
23
C
VOUTCLK
10µF
10V
LTC1705
22
PGOOD
10Ω
19
10µF
D
CPIO
MBR
0520LT1
QTIO
C
CPIO
1µF
L
IO
3µH
C
OUTIO
QBIO 100µF
10V
×2
RB2
10k
1%
+
1µF
QTCA
L
C
0.68µH
V
OUTC
0.9V TO 2V
15A
C
CPC
1µF
QBCB
QBCA
V
CC
26
TGIO
27
BOOSTIO
SWIO
BGIO
I
MAXIO
COMPIO
FBIO
V
INCLK
25
28
1
21
20
24
1µF
+
C
OUTC
180µF
4V
×6
+
R
IMAXI0
, 16k
R22, 11k
C22
100pF
C11
R31
C31 1.8k 1800pF
1800pF
R21, 11k
10k
C
IN
: KEMET T510X337K010AS
C
OUTC
: PANASONIC EEFUE0G181R
C
OUTIO
: AVX TPS0107M010R0065
L
C
: SUMIDA CEP125-4712-T007
L
IO
: SUMIDA CDRH6D28-3R0
QTCA, QTCB, QBCA, QBCB: FAIRCHILD FDS6670A
QTIO, QBIO: 1/2 FAIRCHILD NDS8926
SHUTDOWN
C21
330pF
C
SS
0.1µF
10
9
7
12
14–18
+
C
VINCLK
10µF
10V
+
5-BIT VID
U
U
U
+
1µF
V
OUTIO
1.5V
3A
C12
2200pF
V
INCLK
3.3V
R12
8.87k
1%
1µF
V
OUTCLK
2.5V
150mA
1705 TA01
1
LTC1705
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
I
MAXIO
PV
CC
BOOSTC
BGC
TGC
SWC
PGND
I
MAXC
RUN/SS
1
2
3
4
5
6
7
8
9
28 BGIO
27 BOOSTIO
26 TGIO
25 SWIO
24 V
INCLK
23 V
OUTCLK
22 PGOOD
21 COMPIO
20 FBIO
19 V
CC
18 VID4
17 VID3
16 VID2
15 VID1
Supply Voltage
V
CC
, PV
CC
, V
INCLK
.................................................. 6V
BOOSTC, BOOSTIO ............................................. 12V
BOOSTC – SWC, BOOSTIO – SWIO ....................... 6V
Input Voltage
SWC, SWIO ................................................ –1V to 6V
SENSEC, FBC, FBIO, VIDn
.......
– 0.3V to (V
CC
+ 0.3V)
PGOOD, RUN/SS,
I
MAXC
, I
MAXIO ..................................
– 0.3V to (V
CC
+ 0.3V)
Peak Output Current <10µs
TGC, BGC .............................................................. 5A
TGIO, BGIO ....................................................... 1.25A
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1705EGN
COMPC 10
FBC 11
GND 12
SENSEC 13
VID0 14
GN PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX
= 125°C,
θ
JA
= 80°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
CC
= PV
CC
= BOOST = 5V, V
INCLK
= 3.3V unless otherwise specified. (Note 3)
SYMBOL PARAMETER
V
CC
PV
CC
BV
CC
V
INCLK
I
VCC
I
PVCC
I
BOOST
I
VINCLK
V
SHDN
I
SS
V
SENSEC
V
FBC
V
FBIO
dV
FB
dV
OUT
I
FBIO
V
CC
Supply Voltage
PV
CC
Supply Voltage
BOOST Pin Voltage
V
INCLK
Supply Voltage
V
CC
Supply Current
PV
CC
Supply Current
I
BOOSTC
+ I
BOOSTIO
V
INCLK
Supply Current
RUN/SS Shutdown Threshold
RUN/SS Source Current
Output Voltage Accuracy
Core Feedback Voltage
I/O Feedback Voltage
Feedback Voltage Line Regulation
Output Voltage Load Regulation
I/O Feedback Input Current
V
CC
= 3.3V to 5.5V
(Note 7)
Test Circuit 1
RUN/SS = 0V
(Note 4)
V
BOOST
– V
SW
(Note 4)
CONDITIONS
q
q
q
q
q
q
MIN
3.15
3.15
3.15
3
TYP
5
5
5
3.3
4.5
40
2
1
2
1
1
4
MAX
5.5
5.5
5.5
5.5
8
100
6
50
6
50
1.5
30
UNITS
V
V
V
V
mA
µA
mA
µA
mA
µA
mA
µA
V
µA
V
SENSEC
= V
FBIO
= 0V, No Load at Drivers (Note 5)
q
q
RUN/SS = 0V (Note 6)
V
SENSEC
= V
FBIO
= 0V, No Load at Drivers (Note 5)
q
RUN/SS = 0V (Note 6)
q
I
VOUTCLK
= 0mA
RUN/SS = 0V
V
RUN/SS
↑
(Rising Edge)
RUN/SS = 0V
Programmed from 0.9V to 2V
(Note 10)
q
q
q
q
q
q
q
q
0.2
0.5
–3
Core, I/O Supply Control Loops
–1.25
0.800
0.784
– 0.2
0.800
±0.01
– 0.1
±1
0.816
±0.1
1.25
%
V
V
%/V
%
µA
2
U
W
U
U
W W
W
LTC1705
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
CC
= PV
CC
= BOOST = 5V, V
INCLK
= 3.3V unless otherwise specified. (Note 3)
SYMBOL PARAMETER
A
FB
GBW
I
COMP
V
PGOOD
A
ILIM
I
IMAX
f
OSC
Φ
OSC
DC
MAX
t
NOV
t
r
, t
f
V
OUTCLK
Feedback Amplifier DC Gain
Feedback Amplifier Gain Bandwidth Product
Feedback Amplifier Output Sink/Source Current
Negative Power Good Threshold
Positive Power Good Threshold
Current Limit Amplifier DC Gain
I
MAX
Source Current
Oscillator Frequency
Core and I/O Oscillator Phase Difference
Maximum Duty Cycle
Driver Nonoverlap
Driver Rise/Fall Time
CLK Output Voltage
Output Voltage Load Regulation
ILM
CLK
V
PGOOD
VID Inputs
R1
R
VID
V
VID
PGOOD
I
PGOOD
V
OLPG
T
PGOOD
V
PGOOD
Sink Current
PGOOD Output Low Voltage
V
PGOOD
Falling Edge Delay
V
PGOOD
Rising Edge Delay
V
PBAD
Pulse
Power Good
Power Bad
I
PGOOD
= 1mA
q
q
q
q
q
q
CONDITIONS
q
MIN
74
±3
–15
6
40
–12
460
87
10
TYP
85
20
±10
–10
10
60
–10
550
180
90
25
15
MAX
UNITS
dB
MHz
mA
f = 100kHz (Note 7)
q
Relative to Nominal Output Voltage
q
q
q
–6
15
–8
650
93
120
100
2.55
±0.1
–150
0.5
–6
15
%
%
dB
µA
kHz
DEG
%
ns
ns
V
%/V
%
mA
V
%
%
kΩ
kΩ
V
IMAXC
= V
IMAXIO
= 0V
Test Circuit 1
(Note 7)
q
Core, I/O Supply Switching Characteristics
q
q
Test Circuit 1, 50% to 50%
Test Circuit 1, 10% to 90%
I
VOUTCLK
= 0mA
V
INCLK
= 3.0V to 5.5V
I
VOUTCLK
= 0mA to 150mA
I
VOUTCLK
= 0V
I
VOUTCLK
= 150mA, d
VOUTCLK
= –1% (Note 8)
Relative to V
OUTCLK
Relative to V
OUTCLK
q
q
Clock Supply Output
q
q
q
q
q
q
q
2.45
– 0.1
2.50
±0.02
– 0.05
– 240
0.3
dV
OUTCLK
Output Voltage Line Regulation
CLK Output Short-Circuit Current
Negative V
OUTCLK
Power Good Threshold
Positive V
OUTCLK
Power Good Threshold
Resistance Across SENSEC and FBC
VID Input Pull-Up Resistance
VID Input Threshold
V
DROPOUT
CLK Output Dropout Voltage
–15
6
–10
10
10
(Note 9)
q
30
0.4
1.6
10
10
0.03
2
10
10
4
20
20
0.1
8
40
40
V
µA
mA
V
µs
µs
µs
VID Code Change
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LTC1705 is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4:
PV
CC
and BV
CC
(V
BOOST
– V
SW
) must be greater than V
GS(ON)
of
the external MOSFETs to ensure proper operation.
Note 5:
Supply current in normal operation is dominated by the current
needed to charge and discharge the capacitance of the external MOSFET
gates. This current varies with supply voltage and the choice of external
MOSFETs.
Note 6:
Supply current in shutdown is dominated by external MOSFET
leakage and may be significantly higher than the quiescent current drawn
by the LTC1705, especially at elevated temperature.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
Dropout voltage is the minimum input-to-output voltage
differential required to maintain regulation at the specified output current.
In dropout, the output voltage will be equal to V
INCLK
– V
DROPOUT
.
Note 9:
Each internal pull-up resistor attached to the VID inputs has a
series diode connected to V
CC
to allow input voltages higher than the V
CC
supply without damage or clamping. (See Block Diagram.)
Note 10:
The core feedback voltage accuracy is guaranteed by the V
SENSE
output voltage accuracy test.
3
LTC1705
TYPICAL PERFOR A CE CHARACTERISTICS
V
SENSEC
vs Temperature
1.315
1.310
1.305
V
SENSEC
(V)
V
CC
= 5V
V
OUT
= 1.3V
∆V
SENSEC
(mV)
1.300
1.295
1.290
1.285
–50
–25
0
25
50
75
TEMPERATURE (°C)
V
SENSEC
Load Regulation
0.8
T
A
= 25°C
V
OUT
= 1.6V
0.05
100
0
∆V
SENSEC
(mV)
EFFICIENCY (%)
–0.8
–1.6
–2.4
–3.2
0
3
6
9
I
LOAD
(A)
12
V
FBIO
vs Temperature
0.810
V
CC
= 5V
0.806
0.80
0.64
0.48
0.32
V
FBIO
(V)
0.802
∆V
FBIO
(mV)
0.798
0.794
0.790
–50
–25
0
25
50
75
TEMPERATURE (°C)
4
U W
V
SENSEC
Line Regulation
1.30
1.04
0.78
0.52
0.26
0
–0.26
–0.52
–0.78
–1.04
–1.30
100
125
3
3.5
4
4.5
V
CC
(V)
5
5.5
6
1705 G02
0.10
T
A
= 25°C
0.08
0.06
0.04
∆V
SENSE
(%)
0.02
0
–0.02
–0.04
–0.06
–0.08
–0.10
1705 G01
Core Supply Efficiency
V
OUT
= 2V
0
∆V
SENSE
(%)
90
V
OUT
= 1.6V
–0.05
80
V
OUT
= 0.9V
–0.10
70
–0.15
60
V
IN
= 5V, T
A
= 25°C, I/O DISABLED
QTC = QBC = 2× FDS6670A
50
0
3
6
9
I
LOAD
(A)
12
15
1705 G04
–0.20
15
1705 G03
V
FBIO
Line Regulation
0.10
T
A
= 25°C
0.08
0.06
0.04
0.02
0
–0.02
–0.04
–0.06
–0.08
–0.10
3
3.5
4
4.5
V
CC
(V)
5
5.5
6
1705 G06
0.16
0
–0.16
–0.32
–0.48
–0.64
–0.80
∆V
FBIO
(%)
100
125
1705 G05
LTC1705
TYPICAL PERFOR A CE CHARACTERISTICS
I/O Supply Efficiency
100
CURRENT LIMIT THRESHOLD (A)
V
IN
= 5V, V
OUT
= 1.5V, T
A
= 25°C,
CORE DISABLED, QTIO = QBIO = NDS8926
90
EFFICIENCY (%)
80
70
60
50
0
0.5
1
1.5
I
LOAD
(A)
2
2.5
1705 G07
V
OUTC
vs Load Current
2.0
2.55
2.54
2.53
1.5
2.52
∆V
OUTCLK
(mV)
V
OUTCLK
(V)
V
OUTC
(V)
1.0
T
A
= 25°C, V
IN
= 5V,
V
OUT
= 1.6V,
QBC = 2× FDS6670A,
R
IMAXC
= 24.9k,
C
RUNSS
= 0.01µF
0
4
8
12
LOAD CURRENT (A)
16
20
1705 G10
0.5
0
V
OUTCLK
Load Regulation
0.5
T
A
= 25°C
0
–0.5
–1.0
–1.5
–2.0
–2.5
–150
0
V
DROPOUT
(mV)
–0.02
–0.04
–0.06
–0.08
–0.10
–125
–100 –75
–50
I
OUTCLK
(mA)
–25
0
1705 G13
∆V
OUTCLK
(mV)
ILM
CLK
(mA)
U W
V
OUTC
0A To 10A Load Step
24
0A TO 10A
LOAD
5A/DIV
V
OUT
= 1.6V
AC 50mV/
DIV
22
20
18
16
14
12
Current Limit Threshold vs
Temperature
V
IN
= 5V, V
OUT
= 1.6V,
∆V
OUT
= –1%,
R
IMAXC
= 24.9k, QTC = QBC = 2× FDS6670A
5ms/DIV
1705 G08
10
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1705 G09
V
OUTCLK
vs Temperature
2.5
V
INCLK
= 3.3V
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–25
0
25
50
75
TEMPERATURE (°C)
100
125
V
OUTCLK
Line Regulation
0.10
T
A
= 25°C
0.08
0.06
0.04
∆V
OUTCLK
(%)
0.02
0
–0.02
–0.04
–0.06
–0.08
–0.10
3
3.5
4
4.5
V
INCLK
(V)
1705 G11
1705 G12
2.51
2.50
2.49
2.48
2.47
2.46
2.45
–50
5
5.5
6
V
OUTCLK
Dropout Voltage vs
Temperature
0.02
500
450
400
350
300
250
200
–310
150
100
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
∆V
OUTCLK
(%)
–230
I
OUTCLK
= –150mA
–190
–150
V
OUTCLK
Short-Circuit Current vs
Temperature
V
INCLK
= 3.3V
–270
–350
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1705 G14
1705 G15
5
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