AM79Q031 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Topical application> Wireless rf/communication> AM79Q031

AM79Q031: DescriptionPCM CODEC, PQCC44; CategoryTopical application Wireless rf/communication; File Size926KB，68 Pages; ManufacturerETC

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AM79Q031 Overview

PCM CODEC, PQCC44

AM79Q031 Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	44
Maximum operating temperature	70 Cel
Minimum operating temperature	0.0 Cel
Processing package description	Plastic, LCC-44
state	TRANSFERRED
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	ChipCARRIER
surface mount	Yes
Terminal form	J BEND
Terminal spacing	1.27 mm
Terminal location	Four
Packaging Materials	Plastic/Epoxy
Temperature level	COMMERCIAL
Communication type	encode decode

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Am79Q02/021/031

Quad Subscriber Line Audio-Processing Circuit

(QSLAC™) Devices

DISTINCTIVE CHARACTERISTICS

Software programmable:

— SLIC input impedance

— Transhybrid balance

— Transmit and receive gains

— Equalization (frequency response)

— Digital I/O pins

— Programmable debouncing on one input

— Time slot assigner

— Programmable clock slot and PCM transmit clock

edge options

Standard microprocessor interface

A-law, µ-law, or linear coding

Single or Dual PCM ports available

— Up to 128 channels (PCLK at 8.192 MHz) per

PCM port

— Optional supervision on the PCM highway

GENERAL DESCRIPTION

The Am79Q02/021/031 Quad Subscriber Line Audio-

Processing Circuit (QSLAC) devices integrate the key

functions of analog linecards into high-performance,

very-programmable, four-channel codec-filter devices.

The QSLAC devices are based on the proven design

of Legerity’s reliable SLAC™ device families. The

advanced ar chitecture of the Q SLAC devic es

implements four independent channels and employs

digital filters to allow software control of transmission,

thus providing a cost-effective solution for the audio-

processing function of programmable linecards.

Advanced submicron CMOS technology makes the

Am79Q02/021/031 QSLAC devices economical, with

both the functionality and the low power consumption

needed in linecard designs to maximize linecard

density at minimum cost. When used with four Legerity

SLICs, a QSLAC device provides a complete software-

configurable solution to the BORSCHT functions.

Performs the functions of four codec/filters

1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144,

6.176, or 8.192 MHz master clock derived from

MCLK or PCLK

Built-in test modes with loopback, tone

generation, and

P access to PCM data

Low-power, 5.0 V CMOS technology

5.0 V only operation

Mixed state (analog and digital) impedance

scaling

Performance characteristics guaranteed over a

12 dB gain range

Real Time Data register with interrupt (open

drain or TTL output)

Supports multiplexed SLIC inputs

Broadcast state

256 kHz or 293 kHz chopper clock for Legerity

SLICs with switching regulator

Maximum channel bandwidth for V.34 modems

Publication#

080147

Rev:

Amendment:

Issue Date:

September 2001

TABLE OF CONTENTS

Distinctive Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Connection Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Transmission Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Attenuation Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Group Delay Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Variation of Gain with Input Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Total Distortion, Including Quantizing Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Discrimination against Out-of-Band Input Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Discrimination against 12- and 16 kHz Metering Signals . . . . . . . . . . . . . . . . . . . . . . . . . 18

Spurious Out-of-Band Signals at the Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Overload Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Switching Characteristics (PCM/MPI Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Microprocessor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Master Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Auxiliary Output Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Input and Output Waveforms for AC Tests. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Master Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Microprocessor Interface (Input Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Microprocessor Interface (Output Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

PCM Highway Timing for XE = 0 (Transmit on Negative PCLK Edge) . . . . . . . . . . . . . . . 23

PCM Highway Timing for XE = 1 (Transmit on Positive PCLK Edge) . . . . . . . . . . . . . . . . 24

Operating the QSLAC Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Power-Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Channel Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

SLIC Control and Data Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Clock Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

E1 Multiplex Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Debounce Filters Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Real-Time Data Register Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Interrupt Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Active State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Inactive State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Low Power State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Chopper Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Overview of Digital Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Two-Wire Impedance Matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Frequency Response Correction and Equalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Transhybrid Balancing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Gain Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Am79Q02/021/031 Data Sheet

Transmit Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Transmit PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Receive Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Receive PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Analog Impedance Scaling Network (AISN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Speech Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Signaling on the PCM Highway . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Robbed-Bit Signaling Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Default Filter Coefficients. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Command Description and Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Microprocessor Interface Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Summary of MPI Commands* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MPI Command Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Programmable Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

General Description of CSD Coefficients. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

User Test States and Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A-Law and

-Law Companding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

LIST OF FIGURES

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Attenuation Distortion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Group Delay Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A-Law/

-Law Gain Tracking with Tone Input (Both Paths) . . . . . . . . . . . . . . . .

A-Law/

-Law Total Distortion with Tone Input (Both Paths) . . . . . . . . . . . . . . .

Discrimination Against Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . .

Spurious Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A/A Overload Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Clock Mode Option. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SLIC I/O, E1 Multiplex, and Real-Time Data Register Operation . . . . . . . . . . .

E1 Multiplex Internal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MPI Real-Time Data Register or GCI Upstream SC Channel Data . . . . . . . . . .

QSLAC Device Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Robbed-Bit Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

LIST OF TABLES

Table 1

Table 2

Table 3

dBm0 Voltage Definitions with Unity Gain in X, R, GX, GR, AX, and AR . . . . . 13

A-Law: Positive Input Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

-Law: Positive Input Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

SLAC Products

AM79Q031 Related Products

	AM79Q031	AM79Q02	AM79Q021JC	AM79Q021	AM79Q02JC	AM79Q021VC	AM79Q031JC
Description	PCM CODEC, PQCC44	PCM CODEC, PQCC44	PCM CODEC, PQCC44	PCM CODEC, PQCC44	PCM CODEC, PQCC44	PCM CODEC, PQCC44	PCM CODEC, PQCC44
Number of functions	1	1	1	1	1	1	1
Number of terminals	44	44	44	44	44	44	44
Maximum operating temperature	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel
Minimum operating temperature	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel
Processing package description	Plastic, LCC-44	Plastic, LCC-44	Plastic, LCC-44	Plastic, LCC-44	Plastic, LCC-44	Plastic, LCC-44	Plastic, LCC-44
state	TRANSFERRED	TRANSFERRED	TRANSFERRED	TRANSFERRED	TRANSFERRED	TRANSFERRED	TRANSFERRED
Craftsmanship	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
packaging shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package Size	ChipCARRIER	ChipCARRIER	ChipCARRIER	ChipCARRIER	ChipCARRIER	ChipCARRIER	ChipCARRIER
surface mount	Yes	Yes	Yes	Yes	Yes	Yes	Yes
Terminal form	J BEND	J BEND	J BEND	J BEND	J BEND	J BEND	J BEND
Terminal spacing	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	Four	Four	Four	Four	Four	Four	Four
Packaging Materials	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Communication type	encode decode	encode decode	encode decode	encode decode	encode decode	encode decode	encode decode

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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